With the end of Moore's Law, computer architects have turned to multicore architecture to provide high performance. Unfortunately, to achieve higher performance, multicores require programs to be parallelized which is an untamed problem. Amdahl's law tells that the maximum theoretical speedup of a program is dictated by the size of the non-parallelizable section of a program. Hence to achieve higher performance, programmers need to reduce the size of sequential code in the program. This thesis explores asynchronous work as a means to reduce sequential portions of program. Using asynchronous work, a programmer can remove tasks which do not affect data consistency from the critical path and can be performed using background thread. Using this idea, the thesis introduces two systems. First, a synchronization mechanism, Multi-Version Read-Log-Update(MV-RLU), which extends Read-Log-Update (RLU) through multi-versioning. At the core of MV-RLU design is a concurrent garbage collection algorithm which reclaims obsolete versions asynchronously reducing blocking of threads. Second, a concurrent and highly scalable index-structure called Hydralist for multi-core. The key idea behind design of Hydralist is that an index-structure can be divided into two component (search layer and data layer) and updates to data layer can be done synchronously while updates to search layer can be propagated asynchronously using background threads. / Master of Science / Up until mid-2000s, Moore's law predicted that performance CPU doubled every two years. This is because improvement in transistor technology allowed smaller transistor which can switch at higher frequency leading to faster CPU clocks. But faster clock leads to higher heat dissipation and as chips reached their thermal limits, computer architects could no longer increase clock speeds. Hence they moved to multicore architecture, wherein a single die contains multiple CPUs, to allow higher performance. Now programmers are required to parallelize their code to take advangtage of all the CPUs in a chip which is a non trivial problem. The theoretical speedup achieved by a program on multicore architecture is dictated by Amdahl's law which describes the non parallelizable code in a program as the limiting factor for speedup. For example, a program with 99% parallelizable code can achieve speedup of 20 whereas a program with 50% parallelizable code can only achieve speedup of 2. Therefore to achieve high speedup, programmers need to reduce size of serial section in their program. One way to reduce sequential section in a program is to remove non-critical task from the sequential section and perform the tasks asynchronously using background thread. This thesis explores this technique in two systems. First, a synchronization mechanism which is used co-ordinate access to shared resource called Multi-Version Read-Log-Update (MV-RLU). MV-RLU achieves high performance by removing garbage collection from critical path and performing it asynchronously using background thread. Second, an index structure, Hydralist, which based on the insight that an index structure can be decomposed into two components, search layer and data layer, and decouples updates to both the layer which allows higher performance. Updates to search layer is done synchronously while updates to data layer is done asynchronously using background threads. Evaluation shows that both the systems perform better than state-of-the-art competitors in a variety of workloads.

We propose and solve a synchronized path following problem for a differential drive robot modeled as a dynamic unicycle and an Euler-Lagrange system. Each system is assigned a simple closed curve in its output space. The outputs of systems must approach and traverse their assigned curves while synchronizing their motions along the paths. The synchronization problems we study in this thesis include velocity synchronization and position synchronization. Velocity synchronization aims to force the velocities of the systems be equal on the desired paths. Position synchronization entails enforcing a positional constraint between the systems modeled as a constraint function on the paths. After characterizing feasible positional constraints, a finite-time stabilizing control law is used to enforce the position constraint.

We propose and solve a synchronized path following problem for a differential drive robot modeled as a dynamic unicycle and an Euler-Lagrange system. Each system is assigned a simple closed curve in its output space. The outputs of systems must approach and traverse their assigned curves while synchronizing their motions along the paths. The synchronization problems we study in this thesis include velocity synchronization and position synchronization. Velocity synchronization aims to force the velocities of the systems be equal on the desired paths. Position synchronization entails enforcing a positional constraint between the systems modeled as a constraint function on the paths. After characterizing feasible positional constraints, a finite-time stabilizing control law is used to enforce the position constraint.

abstract: Wireless sensor networks (WSN) and the communication and the security therein have been gaining further prominence in the tech-industry recently, with the emergence of the so called Internet of Things (IoT). The steps from acquiring data and making a reactive decision base on the acquired sensor measurements are complex and requires careful execution of several steps. In many of these steps there are still technological gaps to fill that are due to the fact that several primitives that are desirable in a sensor network environment are bolt on the networks as application layer functionalities, rather than built in them. For several important functionalities that are at the core of IoT architectures we have developed a solution that is analyzed and discussed in the following chapters. The chain of steps from the acquisition of sensor samples until these samples reach a control center or the cloud where the data analytics are performed, starts with the acquisition of the sensor measurements at the correct time and, importantly, synchronously among all sensors deployed. This synchronization has to be network wide, including both the wired core network as well as the wireless edge devices. This thesis studies a decentralized and lightweight solution to synchronize and schedule IoT devices over wireless and wired networks adaptively, with very simple local signaling. Furthermore, measurement results have to be transported and aggregated over the same interface, requiring clever coordination among all nodes, as network resources are shared, keeping scalability and fail-safe operation in mind. Furthermore ensuring the integrity of measurements is a complicated task. On the one hand Cryptography can shield the network from outside attackers and therefore is the first step to take, but due to the volume of sensors must rely on an automated key distribution mechanism. On the other hand cryptography does not protect against exposed keys or inside attackers. One however can exploit statistical properties to detect and identify nodes that send false information and exclude these attacker nodes from the network to avoid data manipulation. Furthermore, if data is supplied by a third party, one can apply automated trust metric for each individual data source to define which data to accept and consider for mentioned statistical tests in the first place. Monitoring the cyber and physical activities of an IoT infrastructure in concert is another topic that is investigated in this thesis. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2017

This thesis deals with computer simulation of the communication chain using the OFDM modulation. In the beginning of my thesis there is a brief description of digital modulations, especially OFDM. The model of the transmitter, radio channel and receiver, including a simple timing and frequency synchronization and equalization is designed and simulated in the Matlab environment. There is a designed communication system implemented into USRP development board in the Simulink environment. The development board could not work simultaneously as a transmitter and as a receiver. Function of the transmitter was verified by measuring on spectrum analyzer. Testing OFDM signal using the arbitrary waveform generator CompuGen 4302 was generated for the verification of the function of the receiver. Testing signal was received and demodulated on the development board which works as a receiver.