De nos jours, les processus métiers permettent une automatisation croissante des tâches et des interconnexions complexes au sein du même système et entre différents systèmes, ce qui est particulièrement facilité par l'émergence des services Web. Dans ce contexte, les tâches de spécification et de vérification de la conformité pendant l’exécution deviennent particulièrement intéressantes. Dans cette thèse, on s’intéresse à deux aspects, le monitoring et la sécurité dans le contexte de l’Architecture Orienté Service (SOA). Ainsi, nous proposons une approche fondée sur le concept de vue et une plateforme qui vise le monitoring de la conformité des processus métiers pendant leur exécution. Ainsi, nous avons développé un langage de monitoring appelé BPath, qui est un langage basé sur XPath, qui offre entre autres, la possibilité de spécifier et de vérifier des propriétés de la logique temporelle linéaire et hybride, des requêtes visant à évaluer des indicateurs quantitatifs sur l’exécution d’un processus métier, ceci dans le but de détecter toute violation des règles de conformité pendant l’exécution.Une des préoccupations spécifiques du monitoring de la conformité pour les environnements basés sur SOA est la sécurité. Ainsi, nous proposons une architecture de sécurité fondée sur des langages dédiés (DSL) pour SOA. Nous avons particulièrement développé une DSL graphique pour faciliter la spécification et la génération des contrôles d’accès. Nos approches sont mises en œuvre et intégrés dans une plateforme développée dans le cadre du projet Européen COMPAS qui vise à assurer la conformité de bout en bout dans les environnements basés sur SOA. / Nowadays, business processes allow more automation of tasks and complex interconnections within the same system and across different systems, which is particularly facilitated by the emergence of Web services. In this context, the tasks of specifying and checking compliance at runtime become particularly challenging.In this thesis, our goal is twofold: monitoring and security in the context of Service Oriented Architecture (SOA). Thus, we proposed a view-based monitoring approach and a framework that target monitoring of business process compliance at runtime. Our monitoring framework aims to offer an easy way to specify properties to be monitored and to facilitate its integration with SOA based environments. Thus, we have developed a new monitoring language called BPath, which is an XPath-based language that offers among others, the ability to express and to check temporal and hybrid logic properties at runtime, making the execution of business processes visible by expressing and evaluating quantitative indicators, in order to detect any compliance violation at runtime. A specific compliance monitoring concern in SOA based environment is security, which is also an important aspect for companies willing to give access to some of their resources over the Web. Thus, we proposed a domain specific language (DSL) based architecture for ensuring security in SOA environments. We particularly focused on access control by proposing a graphical language to facilitate the specification and generation of access control policies.Our approaches are implemented and integrated within a complete end to end compliance framework developed within the COMPAS project.

A evolução de sistemas de gerenciamento de tráfego aéreo é pesquisada para suportar o crescimento na demanda por transporte aéreo. Uma alternativa para essa evolução é o aumento no grau de automação. Os sistemas automatizados precisam ser tão seguros quanto os sistemas em operação atualmente. Com o uso de técnicas de especificação e verificação formal é possível avaliar os requisitos de sistemas. Neste trabalho, é proposto um ciclo de especificação formal, que consiste em um conjunto de diretrizes para aplicação de técnicas de métodos formais em requisitos escritos em linguagem natural. O resultado esperado da aplicação deste ciclo é um conjunto de requisitos escritos em linguagem natural verificados formalmente. O ciclo é composto pelas etapas: levantamento de requisitos do sistema e classificação em padrões de especificação; mapeamento dos requisitos para as linguagens de especificação formal LTL (Linear Temporal Logic) e CTL (Computation Tree Logic); verificação formal da especificação com o verificador NuSMV; ajustes na especificação baseada nos resultados da verificação; ajustes nos requisitos baseados nos ajustes na especificação. As diretrizes propostas são definidas com a análise da verificação formal do Automated Airspace Concept (AAC), padrões de especificação e diretrizes para uso do verificador NuSMV. Os resultados esperados são obtidos na aplicação do ciclo de especificação em dois estudos de caso. A principal contribuição do trabalho é o conjunto de diretrizes para elaboração de expressões escritas em linguagem de especificação formal baseadas em requisitos escritos em linguagem natural e que podem ser verificadas formalmente. / Air traffic management systems evolution is being researched to support air transportation demand growth. An evolution alternative is system automation degree increase. Automated systems need to be as safe as current operating systems. It is possible to analyze system requirements with the application of formal specification and formal verification techniques. In this work, a specification cycle is proposed. The specification cycle is a set of guidelines to use formal method techniques on requirements written in natural language. The specification cycle application expected result is a set of formally verified requirements written in natural language. This cycle is comprised of the following stages: system requirements elicitation and specification pattern classification; requirements mapping to LTL (Linear Temporal Logic) and CTL (Computation Tree Logic) formal specification languages; specification formal verification using the NuSMV verifier; formal specification adjustment based on verification results; requirements adjustment based on formal specification adjustment. The proposed guidelines are defined with the Automated Airspace Concept (AAC) formal verification analysis, specification patterns and guidelines for the NuSMV formal verifier use. The expected results are accomplished in the specification cycle application on two study cases. The main contribution of this work is the set of guidelines applied to formulate formally verifiable expressions specified in formal specification languages based on system requirements written in natural language.

In the master's thesis we are concerned with the logical perspective on business process model-ing. The logical perspective on business process modeling has several advantages. First, being a formal logical system, first-order logic let us thoroughly understand the foundations of process modeling. Second, after we understand the logical foundations of business process modeling, we are free to build a BPM language based entirely on logic, or map an existing language onto logic, which may be useful for artificial reasoning. Third, if the business process model is mapped to logic (or another declarative language) it can be easily stored in a declarative knowledge base. Forth, logic based process models can be used in companies as a basis for knowledge manage-ment. And fifth, the science of logic offers a number of various semantic enhancements, which can be used in favor of better business process modeling expressiveness. The first objective of the thesis is to perform a thorough review of the literature of both our fields -- the business process modeling and temporal logic. The related second objective is to study the ability of logic to represent processes and the notion of time in general, and to offer techniques for logical process representation. Subsequently, the examples should be provided in order to present that the selected techniques are capable of performing what is sketched in the first paragraph. The third objective is to propose improvements of the current business process modeling approach and provide relevant examples. Eventually, means of extending the tech-niques presented can be proposed, too. The major contribution of the thesis is that it constitutes a reasonable basis for further research in the chosen field. For novices or even experienced in the subject it represents a good stepping stone.

Recently, verification and analysis of data words have gained a lot of interest. Metric temporal logic (MTL) and timed propositional temporal logic (TPTL) are two extensions of Linear time temporal logic (LTL). In MTL, the temporal operator are indexed by a constraint interval. TPTL is a more powerful logic that is equipped with a freeze formalism. It uses register variables, which can be set to the current data value and later these register variables can be compared with the current data value. For monotonic data words, Alur and Henzinger proved that MTL and TPTL are equally expressive and the satisfiability problem is decidable. We study the expressive power, satisfiability problems and path checking problems for MLT and TPTL over all data words. We introduce Ehrenfeucht-Fraisse games for MTL and TPTL. Using the EF-game for MTL, we show that TPTL is strictly more expressive than MTL. Furthermore, we show that the MTL definability problem that whether a TPTL-formula is definable in MTL is not decidable. When restricting the number of register variables, we are able to show that TPTL with two register variables is strictly more expressive than TPTL with one register variable. For the satisfiability problem, we show that for MTL, the unary fragment of MTL and the pure fragment of MTL, SAT is not decidable. We prove the undecidability by reductions from the recurrent state problem and halting problem of two-counter machines. For the positive fragments of MTL and TPTL, we show that a positive formula is satisfiable if and only it is satisfied by a finite data word. Finitary SAT and infinitary SAT coincide for positive MTL and positive TPTL. Both of them are r.e.-complete. For existential TPTL and existential MTL, we show that SAT is NP-complete. We also investigate the complexity of path checking problems for TPTL and MTL over data words. These data words can be either finite or infinite periodic. For periodic words without data values, the complexity of LTL model checking belongs to the class AC^1(LogDCFL). For finite monotonic data words, the same complexity bound has been shown for MTL by Bundala and Ouaknine. We show that path checking for TPTL is PSPACE-complete, and for MTL is P-complete. If the number of register variables allowed is restricted, we obtain path checking for TPTL with only one register variable is P-complete over both infinite and finite data words; for TPTL with two register variables is PSPACE-complete over infinite data words. If the encoding of constraint numbers of the input TPTL-formula is in unary notation, we show that path checking for TPTL with a constant number of variables is P-complete over infinite unary encoded data words. Since the infinite data word produced by a deterministic one-counter machine is periodic, we can transfer all complexity results for the infinite periodic case to model checking over deterministic one-counter machines.

Avec l'évolution des technologies, la complexité des systèmes informatiques ne cesse de s'accroître. Parmi ces systèmes, on retrouve les logiciels critiques qui doivent offrir une garantie de sûreté de fonctionnement qui s'avère crucial et pour lesquels un dysfonctionnement peut avoir des conséquences graves. Les méthodes formelles fournissent des outils permettant de garantir mathématiquement l'absence de certaines erreurs. Ces méthodes sont indispensables pour assurer les plus hauts niveaux de sûreté. Mais l'application de ces méthodes sur un code système bas niveau se heurte à des difficultés d'ordre pratique et théorique. Les principales difficultés concernent la prise en compte des aspects bas niveau, comme les pointeurs et les interactions avec le matériel spécifique. De plus, le fait que ces systèmes soient concurrents conduit à une augmentation exponentielle du nombre de comportements possibles, ce qui rend plus difficile leur vérification. Dans cette thèse, nous proposons une méthodologie pour la spécification et la vérification par model-checking de ce type de systèmes, en particulier, ceux implémentés en C. Cette méthodologie est basée sur la traduction de la sémantique de C en TLA+, un langage de spécification formel adapté à la modélisation de systèmes concurrents. Nous avons proposé un modèle de mémoire et d'exécution d'un programme C séquentiel en TLA+. En se basant sur ce modèle, nous avons proposé un ensemble de règles de traduction d'un code C en TLA+ que nous avons implémenté dans un outil, appelé C2TLA+. Nous avons montré comment ce modèle peut s'étendre pour modéliser les programmes C concurrents et gérer la synchronisation entre plusieurs processus ainsi que leur ordonnancement. Pour réduire la complexité du model-checking, nous avons proposé une technique permettant de réduire significativement la complexité de la vérification. Cette réduction consiste pour un code C à agglomérer une suite d'instructions lors de la génération du code TLA+, sous réserve d'un ensemble de conditions.Nous avons appliqué la méthodologie proposée dans cette thèse sur un cas d'étude réel issu de l'implémentation d'un micronoyau industriel,sur lequel nous avons vérifié un ensemble de propriétés fonctionnelles. L'application de la réduction a permis de réduire considérablement le temps de la vérification, ce qui la rend utilisable en pratique.Les résultats ont permis d'étudier le comportement du système, de vérifier certaines propriétés et de trouver des bugs indétectables par des simples tests. / Software systems are critical and complex. In order to guarantee their correctness, the use of formal methodsis important. These methods can be defined as mathematically based techniques, languages and tools for specifying and reasoning about systems. But, the application of formal methods to software systems, implemented in C, is challenging due to the presence of pointers, pointer arithmetic andinteraction with hardware. Moreover, software systems are often concurrent, making the verification process infeasible. This work provides a methodology to specify and verify C software systems usingmodel-checking technique. The proposed methodology is based on translating the semantics of Cinto TLA+, a formal specification language for reasoning about concurrent and reactive systems. We define a memory and execution model for a sequential program and a set of translation rules from C to TLA+ that we developed in a tool called C2TLA+. Based on this model, we show that it can be extended to support concurrency, synchronization primitives and process scheduling. Although model-checking is an efficient and automatic technique, it faces the state explosion problem when the system becomes large. To overcome this problem, we propose a state-space reduction technique. The latter is based on agglomerating a set of C instructions during the generation phase of the TLA+ specification. This methodology has been applied to a concrete case study, a microkernel of an industrial real-time operating system, on which a set of functional properties has been verified. The application of the agglomeration technique to the case study shows the usefulness of the proposed technique in reducing the complexity of verification. The obtained results allow us to study the behavior of the system and to find errors undetectable using traditional testing techniques.

Nous proposons de nouveaux algorithmes et de nouvelles structures de données pour la vérification formelle de systèmes réactifs finis sur architectures parallèles. Ces travaux se basent sur les techniques de vérification model checking. Notre approche cible des architectures multi-processeurs et multi-cœurs, avec mémoire partagée, qui correspondent aux générations de serveurs les plus performants disponibles actuellement.Dans ce contexte, notre objectif principal est de proposer des approches qui soient à la fois efficaces au niveau des performances, mais aussi compatibles avec les politiques de partage dynamique du travail utilisées par les algorithmes de génération d’espaces d'états en parallèle; ainsi, nous ne plaçons pas de contraintes sur la manière dont le travail ou les données sont partagés entre les processeurs.Parallèlement à la définition de nouveaux algorithmes de model checking pour machines multi-cœurs, nous nous intéressons également aux algorithmes de vérification probabiliste. Par probabiliste, nous entendons des algorithmes de model checking qui ont une forte probabilité de visiter tous les états durant la vérification d’un système. La vérification probabiliste permet des gains importants au niveau de la mémoire utilisée, en échange d’une faible probabilité de ne pas être exhaustif; il s’agit donc d’une stratégie permettant de répondre au problème de l’explosion combinatoire / In this thesis, we propose and study new algorithms and data structures for model checking finite-state, concurrent systems. We focus on techniques that target shared memory, multi-cores architectures, that are a current trend in computer architectures.In this context, we present new algorithms and data structures for exhaustive parallel model checking that are as efficient as possible, but also ``friendly'' with respect to the work-sharing policies that are used for the state space generation (e.g. a work-stealing strategy): at no point do we impose a restriction on the way work is shared among the processors. This includes both the construction of the state space as the detection of cycles in parallel, which is is one of the key points of performance for the evaluation of more complex formulas.Alongside the definition of enumerative, model checking algorithms for many-cores architectures, we also study probabilistic verification algorithms. By the term probabilistic, we mean that, during the exploration of a system, any given reachable state has a high probability of being checked by the algorithm. Probabilistic verification trades savings at the level of memory usage for the probability of missing some states. Consequently, it becomes possible to analyze part of the state space of a system when there is not enough memory available to represent the entire state space in an exact manner

Linear Temporal Logic (LTL), as one of the temporal logic, can generate a fully automated correct-by-design controller synthesis approach for single or multiple autonomous vehicles, under much more complex missions than the traditional point-to-point navigation.In this master thesis, a framework which combines model- checking-based robot motion planning with action planning is proposed based on LTL for-mulas. The specifications implicitly require both sequential regions for multi-agent to visit and the desired actions to perform at these regions while avoid-ing collision with each other and fixed obstacles. The high level motion and task planning and low level navigation function based collision avoidance controller are verified by nontrivial simulation and implementation on real quadcopter in Smart Mobility Lab.

Autonomous robots have the potential to accomplisha wide variety of assignments. For this to work in reality, therobots need to be able to perform specific tasks while safety forboth them and their environment is ensured. Signal temporallogic (STL) was used to define timed tasks for the agents toperform and control barrier functions (CBFs) were used to designa controller for their movements. In this paper, a set of STL taskswere considered, which two robots were instructed to satisfy in asimulation of a warehouse environment. The two agents startednext to each other, then the set of tasks instructed them to move totwo separate areas, then meet up again and move in a formationback towards their starting area. Control barrier functions wereemployed to ensure the satisfaction of the set of STL tasks.The agents designed their actions towards satisfying the giventasks without considering a safety distance to the other robot atfirst. To later ensure safety, a collision avoidance mechanism wasintroduced. The scenario without collision avoidance proved moreeffective paths for the agents. They moved to satisfy the tasks withless disturbance than the scenario where collision avoidance wasconsidered. However, the scenario with the collision avoidancemechanism proved successful and the agents satisfied their taskswithout colliding with each other. / Autonoma robotar har potential att utföra en stor mängd olika uppgifter. För att detta ska fungera i verkligheten, behöver robotarna kunna genomföra specifika uppgifter medans både deras egen och omgivningens säkerhet är säkerställd. Signal temporal logic (STL) användes för att definiera tidsinställda uppgifter åt robotarna att utföra och control barrier functions (CBFs) användes för att designa en controller för deras rörelser. I den här rapporten betraktades en uppsättning av STL-uppgifter, vilka två robotar instruerades att uppfylla i en simulering av en lagermiljö. De två robotarna startade bredvid varandra, sen instruerade STL-uppgifterna dem att röra sig till två separata områden, sen mötas upp igen och röra sig i formation tillbaka mot sitt startområde. Control barrier functions användes för att garantera uppfyllandet av STL-uppgifterna. Robotarna anpassade sina rörelser till att uppfylla de givna uppgifterna, först utan hänsyn till någon säkerhetsmarginal till den andra roboten. För att senare garantera säkerhet introducerades en extra mekanism för att undvika kollision. Scenariot utan att undvika kollision visade på effektivare rörelsebanor hos robotarna. De rörde sig mot att uppfylla uppgifterna med färre störningar än scenariot då kollision aktivt undveks. Scenariot med mekanismen för att dock framgångsrikt och robotarna e sina uppgifter utan att kollidera med varandra. / Kandidatexjobb i elektroteknik 2021, KTH, Stockholm

We present some initial results on ontology-based query answering with description logic ontologies that may employ temporal and probabilistic operators on concepts and axioms. Speci_cally, we consider description logics extended with operators from linear temporal logic (LTL), as well as subjective probability operators, and an extended query language in which conjunctive queries can be combined using these operators. We first show some complexity results for the setting in which either only temporal operators or only probabilistic operators may be used, both in the ontology and in the query, and then show a 2ExpSpace lower bound for the setting in which both types of operators can be used together. / This is an extended version of an article accepted at Description Logics 2019.

Formulae of linear temporal logic (LTL) can be used to specify (wanted or unwanted) properties of a dynamical system. In model checking, the system’s behaviour is described by a transition system, and one needs to check whether all possible traces of this transition system satisfy the formula. In runtime verification, one observes the actual system behaviour, which at any point in time yields a finite prefix of a trace. The task is then to check whether all continuations of this prefix to a trace satisfy (violate) the formula. More precisely, one wants to construct a monitor, i.e., a finite automaton that receives the finite prefix as input and then gives the right answer based on the state currently reached. In this paper, we extend the known approaches to LTL runtime verification in two directions. First, instead of propositional LTL we use the more expressive temporal logic ALC-LTL, which can use axioms of the Description Logic (DL) ALC instead of propositional variables to describe properties of single states of the system. Second, instead of assuming that the observed system behaviour provides us with complete information about the states of the system, we assume that states are described in an incomplete way by ALC-knowledge bases. We show that also in this setting monitors can effectively be constructed. The (double-exponential) size of the constructed monitors is in fact optimal, and not higher than in the propositional case. As an auxiliary result, we show how to construct Büchi automata for ALC-LTL-formulae, which yields alternative proofs for the known upper bounds of deciding satisfiability in ALC-LTL.