With the potential to improve upon silicon (Si ) based power electronics exhausted, the push for improvement now lies with wide bandgap (WBG) materials like gallium nitride (GaN). With a larger bandgap, higher electron mobility, and higher electrical field strength than Si, GaN high electron mobility transistors (HEMTs) can have lower on-state losses and higher switching frequencies in a smaller package. This makes GaN HEMTs an attractive choice for compact, high efficiency power devices. However, the package designs used for Si cannot be used for GaN HEMTs, requiring novel, chip-scale designs that are optimized for low electrical parasitics and low thermal resistance. Recent Center for Power Electronics (CPES) research culminated in a printed circuit board-direct bonded copper (PCB-DBC) hybrid package to house a 650 V, 150 A GaN HEMT. Called the PCB-Interposer-on-DBC package, it utilizes a DBC for heat extraction while using vertical pin interconnects to minimize electrical parasitics. Previous work did not investigate the design's locations of expected failure or reliability. With thermally generated mechanical fatigue a consistent cause of electronics failure, it must be investigated for the design to move beyond the prototyping phase. Thermo-mechanical fatigue failure is the brittle fracture of bonds caused by thermally induced warpage. The thermal warpage is the consequence of the bonded package components having a coefficient of expansion (CTE) mismatch while being subjected to temperature changes during operation. Multiphysics simulation software have previously quantified the fatigue placed on bonds exposed to these cyclic conditions, with a common metric being the volume-averaged inelastic strain energy density gained per cycle (ΔWavg). ΔWavg can identify which bonds are subjected to the greatest amount of fatigue and will thus fail first, and then quantify the effect of design alterations on those vulnerable bonds. A common design alteration seen in solder ball packaging is adding a polymeric material that encapsulates the bonds. If the polymer has a CTE like that of the package substrates and an elastic modulus (E) exceeding 1 GPa, it constrains the thermal warpage and lowers bond fatigue. This thesis uses thermo-mechanical simulations to provide evidence on which bonds fail first in the package, and that material-based methods of fatigue reduction used in solder ball packing apply to this novel package. Chapter 1 explains how a desire to reduce the cost and increase the performance of electric vehicles led to the development of the PCB-Interposer-on-DBC design, and that the package's response to thermo-mechanical fatigue is unknown. The concepts of thermo-mechanical fatigue and using encapsulants to reduce it are established, along with how simulations are used to study said fatigue. Chapter 2 serves two purposes, the first being an explanation of the simulation settings and metrics used to establish the quality and assumptions used, and the second being a beginners guide on how to create these simulations. Chapter 3 identifies the most probable locations of initial package failure and identifies what encapsulants minimize ΔWavg on those locations. The sintered silver bond expected to fail first is the Internal Gate bond, and an encapsulant with the maximum possible E and 8 ppm/°C minimizes ΔWavg. The Sn60Pb40 bond expected to fail first is the External Source 4 bond and using an encapsulant with the maximum possible E and a CTE of 24 ppm/°C minimizes ΔWavg. While ΔWavg cannot determine which of the two bonds fails first as they are made of different materials, the Internal Gate is prioritized as it has a higher per-cycle fatigue and to prevent loss of the gate signal. Chapter 4 demonstrates how to perform a brief encapsulant study while ranking the expected cycles to failure when using four different encapsulant options. The first two options are to use no encapsulant or silicone gel. As the elastic modulus of silicone gels are too low to restrict or couple the thermally generated warpage, using silicone gel results in a ΔWavg comparable to using no encapsulant. The rigid encapsulant with the properties most like the optimal encapsulant identified for Internal Gate has the lowest ΔWavg¬ of the encapsulants tested. Guidelines are established for what properties an encapsulant must have to outperform said rigid encapsulant. This work uses simulations to provide evidence that encapsulant methods used in ball grid array (BGA) packaging to reduce fatigue apply to a novel GaN HEMT package. By identifying the first-failure locations of the package, establishing what existing encapsulant should be used, and what encapsulation it should eventually be replaced with, these results provide the groundwork for both experimental temperatures cycling and more complex simulations. Such work fills the gap in understanding the reliable lifetime and common failure mechanisms of the PCB-Interposer-on-DBC package. / Master of Science / In modern engineering, the cause of failure in a well-designed electronic device is typically not a single event. Rather, it is the culmination of many smaller events that each cause a minor amount of damage. This cycle of repeated, minor damage is called fatigue. When working with power or IC electronics, the most common type of fatigue occurs due to the device's changing temperature. Electronics undergo continuously changing temperatures due to the environment and their own energy losses, causing repeated cycles of heating and cooling. All materials expand upon heating and contract upon cooling , and the magnitude of this change is the coefficient of thermal expansion (CTE). Electronic devices are comprised of dissimilar materials, so disparate components will expand and contract at different rates. Holding these disparate materials together are bonds, which in the process of holding this warped structure together, also deform. This deformation causes permanent damage, which accumulates in the bonds until they break. As these bonds often serve as pathways for the electrical signal or heat extraction, their failure either degrades or breaks the electrical devices. While preventing bond fatigue is impractical, there are strategies to extend the operating lifetime. A common option used elsewhere is to encase the bonds with a polymer. If the polymer's properties are carefully selected, they can reduce the structural warpage, thereby reducing the fatigue on the bonds. Previous Center for Power Electronics (CPES) research has culminated in a new electronics device called the Printed Circuit Board-Interposer-on-Direct Bonded Copper package (PCB-Interposer-on-DBC package). While general trends suggest which bonds will fail first and what kind of polymers reduce fatigue, this information has not yet been confirmed. This thesis uses computer simulations to identify which bonds will likely fail first, and to provide evidence that existing methods for reducing fatigue are viable for this unique package. The simulations work by subjecting a 3D model to a cycle of heating and cooling, called a temperature cycle, and quantifying the damage sustained by the bonds for every cycle. Chapter 1 describes the relevant details leading to this package design, the importance of thermo-mechanical reliability in the design of electronics, and how to use simulation software to quantify reductions in bond fatigue. Chapter 2 explains how to set up these simulations and evaluate their quality. Chapter 3 identifies the initial locations of package failure and identifies what are the most optimal encapsulants to use. Chapter 4 identifies what existing encapsulant will maximize the package lifetime in experimental temperature cycling.