Chemnitz, Techn. Univ., Diplomarb., 2007.

Made available in DSpace on 2014-06-12T15:59:50Z (GMT). No. of bitstreams: 2 arquivo5650_1.pdf: 2595763 bytes, checksum: 42fc72bb1ec45c1ac0cfbbcdfa706d6d (MD5) license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5) Previous issue date: 2007 / Conselho Nacional de Desenvolvimento Científico e Tecnológico / Há um grande interesse por parte dos pesquisadores em relação às características de autoreconfiguração e auto-adaptação presentes em plataformas modernas de hardware baseadas em dispositivos lógicos dinamicamente reconfiguráveis FPGAs (Field Programmable Gate Arrays). Alguns destes dispositivos apresentam características ainda mais específicas, permitindo sua reconfiguração parcial e dinâmica, o que permite que, parte da lógica, possa ser modificada enquanto o restante do circuito permanece em operação. O objetivo desta dissertação é desenvolver uma Plataforma de Reconfiguração Dinâmica baseada em FPGAs, que permita a execução de aplicações utilizando os métodos de hardware virtual, permitindo modificações nas configurações parciais em hardware, processamento massivo de dados, etc. Esta plataforma é um estudo de caso em reconfiguração dinâmica para implementação real dos trabalhos de pesquisa em Escalonamento de Tarefas e Particionamento Temporal. Esta plataforma híbrida, denominada Aquarius, é composta pelas plataformas Altera e Xilinx, baseadas nos dispositivos FPGAs Stratix-II e Virtex-II, respectivamente. A plataforma Altera oferece todo o suporte para reconfiguração do dispositivo da Xilinx. Esta plataforma é controlada por um processador soft-core Nios da Altera, o qual possui o suporte de um SO uCLinux, além de device drivers especialmente desenvolvidos para reconfiguração do dispositivo da Xilinx. Um módulo de reconfiguração especial, o IP-SelectMAP, foi desenvolvido para programação do hardware dinâmica e parcialmente reconfigurável. Este módulo recebe informações da plataforma da Altera, através dos device drivers, os bitstreams, arquivos responsáveis pela programação do dispositivo da Xilinx. Todos os bitstreams de configuração são previamente escalonados de acordo com a aplicação do usuário. Desenvolver sistemas de reconfiguração dinâmica ainda é um desafio, porque sua implementação é complexa e por haver poucas plataformas de hardware e software para projetá-los. No entanto, metodologias de projeto como as aqui propostas, permitem que novas classes de hardware virtual possam ser, no futuro, mais facilmente utilizados, assim como, soluções reais, em processamento massivo de dados em plataforma Multi-FPGAs

På Ericsson AB i Katrineholm finns ett tekniklaboratorium (Techlab), där den senaste tekniken för GPRS-system finns samlad. Till Ericssons tekniklaboratorium skulle en demo-applikation konstrueras. Applikationen ska illustrera hur en mobiltelefon av typen Ericsson T68 kan skicka en bild via Bluetooth till en LAN nod (BlipC11). Den är kopplad till ett GPRS-nätverk och ska i sin tur skicka vidare bilden till en mottagare på andra sidan nätet. Rapporten ger en teoretisk bakgrund om Bluetooth och GPRS. Vidare i rapporten presenteras lösningsförslag och resultatet av examensarbetet. Projektet har varit problemfyllt. De resultat och slutsatser som erhållits är att utrustningen som varit tillgänglig inte klarar av att handskas med bildobjekt. Det betyder att kravspecifikationen ej kunde fullföljas. Alternativa användningsområden för noden har undersökts, som WAP- eller webserver. En webserver samt olika applikationsexempel till noden är resultatet av detta examensarbete. / At Ericsson AB in Katrineholm is a technical lab (Techlab) located, where the latest technique for GPRS-systems is gathered. A demo-application where supposed to be build for Techlab. The demo-application shall demonstrate the capabilities of Bluetooth and GPRS. An Ericsson T68 mobile will wirelessly send an image across a Bluetooth link to a LAN access point (BlipC11). The access point will then transport the image further on to the GPRS-net to a receiver, at the other end of the net. The report gives a theoretical background about Bluetooth andGPRS. In the report, methods and results of the final year project are presented. During the project a several problems occurred. The results and the conclusions show that an image can’t be sent with the equipment that was handed out. This means that the assignment specification could not be fulfilled. Other scenarios with the LAN access point have been investigated. It could be used as a WAP- or webserver for example. A webserver and some application examples for the access point, is the result of this project.

The JBits Application Programming Interface has significantly shortened FPGA reconfiguration times by manipulating the configurable resources of the FPGAs directly under software control. The execution of JBits programs, however, requires a Java Virtual Machine to be implemented on the platform where the configurations will be modified. This presents a problem for embedded systems where a microprocessor to run a Java Virtual Machine may not be available or desirable. This thesis discusses the implementation of a FPGA platform that allows the execution of JBits programs, effectively changing the configuration of a FPGA within a FPGA. This thesis also presents a four step developing and testing strategy for JBits programs that are intended to run on this FPGA platform. / Master of Science

In Verbindung mit eingebetteten Systemen spielte Sicherheit in der Vergangenheit eher eine untergeordnete Rolle. Im Vordergrund standen vorhersagbare Ausführungszeiten und der finanzielle Rahmen. Aufgrund der zunehmenden Vernetzung und der Konzentration mehrerer Anwendungen auf einen Prozessor gewinnt dieser Gesichtspunkt jedoch stärker an Bedeutung. Der Blackfin-Prozessor des Herstellers Analog Devices, welcher die Konzepte von Mikrocontroller und digitalem Signalprozessor in sich vereint, entspricht diesem Trend, indem er die Möglichkeit des Speicherschutzes integriert. Das Betriebssystem uClinux wurde speziell auf die Bedürfnisse von eingebetteten Systemen angepasst, da es im Gegensatz zu Linux keinen virtuellen Speicher unterstützt. Es wurde zwar bereits auf die Architektur des Blackfin Prozessors portiert, verfügte jedoch bisher nicht über nennenswerte Mechanismen zum Schutz des Speichers. Der Hauptteil dieser Diplomarbeit besteht deshalb darin, Linux’ Speicherverwaltung zu analysieren, einen ähnlichen Ansatz in uClinux zu implementieren und schließlich den Einfluss auf die Leistung des Systems zu ermitteln. Die entstandene Realisierung schützt sowohl den Speicher einzelner Prozesse als auch den des Betriebssystemkerns. Obwohl die Lösung im Moment noch prototypischen Charakter besitzt, ist sie bereits voll funktionsfähig. Des Weiteren diskutiert die Arbeit auch den Ansatz des alleinigen Kernel-Schutzes und unterbreitet einen Vorschlag zur Verringerung der Interrupt-Latenzzeit. / In the past, embedded system’s security has been often omitted in order to trade it for system cost and more predictable execution timings. Due to the pressure induced by increased networking and multitasking, this issue is getting more important. Therefore, Analog Devices’ Blackfin processor, which combines capabilities of signal processing and controlling, additionally provides means for memory protection. The operating system uClinux, which is especially suitable for embedded systems because support for Virtual Memory has been removed, has already been ported to the Blackfin architecture, but still lacks support for memory protection. Thus, the main effort of this thesis consists of analysing Linux’s memory management, reimplementing similar approaches into the uClinux kernel, and measuring the resulting overhead. The implemented protection scheme does secure both particular processes and kernel space. Even if it is still in a prototypical state, memory protection is fully functional. In addition, approaches for exclusive kernel protection and reducing interrupt latency are discussed.

In Verbindung mit eingebetteten Systemen spielte Sicherheit in der Vergangenheit eher eine untergeordnete Rolle. Im Vordergrund standen vorhersagbare Ausführungszeiten und der finanzielle Rahmen. Aufgrund der zunehmenden Vernetzung und der Konzentration mehrerer Anwendungen auf einen Prozessor gewinnt dieser Gesichtspunkt jedoch stärker an Bedeutung. Der Blackfin-Prozessor des Herstellers Analog Devices, welcher die Konzepte von Mikrocontroller und digitalem Signalprozessor in sich vereint, entspricht diesem Trend, indem er die Möglichkeit des Speicherschutzes integriert. Das Betriebssystem uClinux wurde speziell auf die Bedürfnisse von eingebetteten Systemen angepasst, da es im Gegensatz zu Linux keinen virtuellen Speicher unterstützt. Es wurde zwar bereits auf die Architektur des Blackfin Prozessors portiert, verfügte jedoch bisher nicht über nennenswerte Mechanismen zum Schutz des Speichers. Der Hauptteil dieser Diplomarbeit besteht deshalb darin, Linux’ Speicherverwaltung zu analysieren, einen ähnlichen Ansatz in uClinux zu implementieren und schließlich den Einfluss auf die Leistung des Systems zu ermitteln. Die entstandene Realisierung schützt sowohl den Speicher einzelner Prozesse als auch den des Betriebssystemkerns. Obwohl die Lösung im Moment noch prototypischen Charakter besitzt, ist sie bereits voll funktionsfähig. Des Weiteren diskutiert die Arbeit auch den Ansatz des alleinigen Kernel-Schutzes und unterbreitet einen Vorschlag zur Verringerung der Interrupt-Latenzzeit. / In the past, embedded system’s security has been often omitted in order to trade it for system cost and more predictable execution timings. Due to the pressure induced by increased networking and multitasking, this issue is getting more important. Therefore, Analog Devices’ Blackfin processor, which combines capabilities of signal processing and controlling, additionally provides means for memory protection. The operating system uClinux, which is especially suitable for embedded systems because support for Virtual Memory has been removed, has already been ported to the Blackfin architecture, but still lacks support for memory protection. Thus, the main effort of this thesis consists of analysing Linux’s memory management, reimplementing similar approaches into the uClinux kernel, and measuring the resulting overhead. The implemented protection scheme does secure both particular processes and kernel space. Even if it is still in a prototypical state, memory protection is fully functional. In addition, approaches for exclusive kernel protection and reducing interrupt latency are discussed.

At IAV GmbH, Chemnitz, an embedded platform for high-performance sensor data acquisition has been developed. Sensor data is gathered and preprocessed by two digital signal processors (DSP) which communicate bidirectionally via dual-ported memory with the central controlling instance, a Freescale MCF5484 microcontroller running uClinux. The goal of this thesis is to design, implement, analyze and optimize a real-time communication protocol between both DSPs and the microcontroller. The challenges of this thesis can be defined as follows: • A uClinux driver for the dual-ported RAM must be implemented. This driver has to employ the microcontroller’s internal DMA engine and should be integrated into the Linux kernel’s DMA framework. • The DMA engine must be thoroughly analyzed. Especially interesting is its behavior when concurrently performing data transfers. Potential influence factors onto data transfer performance and timing predictability should be experimentally identified and quantitatively characterized, if possible. • Sensor data from the DSPs to the microcontroller has to meet real-time demands and must be prioritized in some way over status and parameter data from and to the DSPs. • Correct and efficient synchronization is a must. If possible, different synchronization schemes should be compared to each other. • The achievable performance in terms of guaranteed and maximum data throughput between DSP and microcontroller as well as end-to-end bandwidth has to be estimated. • Apart from the DMA engine analysis, a general evaluation of potential and achieved performance, timing predictability and the remaining microcontroller’s processing capacity (if any) should be executed.