This thesis includes two topics. The first topic is a ROM-less DDFS (Direct Digital Frequency Synthesizer) using a parabolic polynomial in-terpolation method with an offset adjustment. The second one is the de-sign and fabrication of a silicon-based OEIC(optoelectronic integrated circuit) comprising photodetectors and transimpedance amplifiers.
The ROM-less DDFS employs a parabolic polynomial interpola?tion method with an offset adjustment, where an initial phase offset is added into parabolic polynomials. Besides, the pipelining architecture is adopted to improve the speed of the proposed DDFS.
The OEIC uses the hybrid integration technique to integrate the III-V optoelectronic devices (photodetector) and CMOS integrated circuits (transimpedance amplifier) onto the same substrate (silicon substrate) by the wafer bounding technique. With the realization of the hybrid in-tegration, the bandwidth degeneration resulted from the traditional wire bounding can be avoided.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0714108-214033 |
| Date | 14 July 2008 |
| Creators | Lee, Chia-Chuan |
| Contributors | Shiann-Rong Kuang, Jih-Ching Chiu, Chua-Chin Wang, Sying-Jyan Wang |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714108-214033 |
| Rights | not_available, Copyright information available at source archive |
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