Return to search

A Sizing Algorithm for Non-Overlapping Clock Signal Generators

<p>The non-overlapping clock signal generator circuits are key elements in switched capacitor circuits since non-overlapping clock signals are generally required. Non-overlapping clock signals means signals running at the same frequency and there is a time between the pulses that none of them is high. This time (when both pulses are logic 0) takes place when the pulses are switching from logic 1 to logic 0 or from logic 0 to logic 1. In this thesis this type of clock signal generators are analyzed and designed for different requirements on the switched capacitor (S/C) circuits. Different analytical models for the delay in CMOS inverters are studied. The clock generators for digital circuits based on phase-locked loop and delay-locked loop are also studied. An algorithm, which can automatically size the non-overlapping clock generator circuits, was implemented.</p>

Identiferoai:union.ndltd.org:UPSALLA/oai:DiVA.org:liu-2416
Date January 2004
CreatorsKavak, Fatih
PublisherLinköping University, Department of Electrical Engineering, Institutionen för systemteknik
Source SetsDiVA Archive at Upsalla University
LanguageEnglish
Detected LanguageEnglish
TypeStudent thesis, text
RelationLiTH-ISY-Ex, ; 3482

Page generated in 0.0021 seconds