Modern systems fulfil calculation tasks across the hardware- software boundary. Tasks are divided into coarse parallel subtasks that run on distributed resources. These resources are classified into a software (SW) and a hardware (HW) domain. The software domain usually contains processors for general purpose or digital signal calculations. Dedicated co-processors such as encryption or video en-/decoding units belong to the hardware domain. Nowadays, a decision in which domain a certain subtask will be executed in a system is usually taken during system level design. This is done on the basis of certain assumptions about the system requirements that might not hold at runtime. The HW/SW partitioning is static and cannot adapt to dynamically changing system requirements at runtime. Our contribution to tackle this, is to combine a ESL based HW/SW codesign methodology with a coarse grained reconfigurable System on Chip architecture. We propose this as Preemptive HW/SW-Threading.
Identifer | oai:union.ndltd.org:DRESDEN/oai:qucosa:de:qucosa:19980 |
Date | 14 January 2014 |
Creators | Rößler, Marko, Heinkel, Ulrich |
Publisher | Technische Universität Chemnitz |
Source Sets | Hochschulschriftenserver (HSSS) der SLUB Dresden |
Language | English |
Detected Language | English |
Type | doc-type:conferenceObject, info:eu-repo/semantics/conferenceObject, doc-type:Text |
Source | ReCoSoC '08: Proceedings of the International Conference on Reconfigurable Communication-centric SoCs |
Rights | info:eu-repo/semantics/openAccess |
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