This thesis discusses the design, construction and testing of a highefficiency, 100 MHz, 1 kW, Class-E solid state power amplifier. The design was performed with the aid of computer simulations using electronic design software (ADS). The amplifier was constructed around Ampleon's BLF188XR LDMOS transistor in a single ended design. The results for 100 MHz operation show a power added efficiency of 82% at 1200 W pulsed power output. For operation at 102 MHz results show a power added efficiency of 86% at 1050 W pulsed power output. Measurements of the drain- and gate voltage waveforms provide validation of Class-E operation.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:uu-341693 |
| Date | January 2018 |
| Creators | Book, Stefan |
| Publisher | Uppsala universitet, FREIA |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
| Relation | FYSAST ; FYSMAST1069, FYSAST ; FYSMAST1069 |
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