This dissertation presents a new technique for miniaturization of printed RF circuits and antennas. The technique is based on lumped circuit elements and volumetric reactive pin loadings. The vertical arrangement of the pins is shown to provide a meandered current path within the device volume enhancing the miniaturization achieved with sole application of lumped circuit components. The technique is applied for antenna and filter size reduction. In antenna applications, it is shown that due to the presence of the reactive pin loading the overall size of a printed antenna can be miniaturized without affecting the radiation efficiency performance. One of the major advantages of this approach over the existing miniaturization techniques is that it allows reducing the overall size of the antenna (i.e. the substrate size) in addition to its metallization footprint area. Specifically, three antenna designs are presented for GPS and ISM applications. Firstly, a miniaturized wide-band CDL antenna has been introduced. The antenna consists of two loops which are loaded with lumped inductors and coupling capacitors. The design is shown to exhibits 49% smaller footprint size as compared to a traditional patch antenna without degrading the bandwidth performance. Secondly, a circular polarized compact dual-band CDL GPS antenna loaded with lumped capacitors and vertical pins is shown. The antenna operates with >50% lesser area as compared to a traditional L2 patch antenna without degrading its radiation performance. Thirdly, a patch antenna with its cavity loaded with CSRRs is presented. The novelty of the design is that it provides circularly symmetric arrangement of CSRRs thereby enabling the antenna to exhibit circular polarization (CP). Apart from CSRR, further size reduction is obtained by simultaneously reducing the substrate size and ground plane metallization around the CSRRs and loading it with pins. The antenna is 44% smaller than a traditional patch antenna without causing degradation in the antenna's radiation efficiency performance. To extend the volumetric loading to filter applications, the last chapter of the dissertation presents a detailed analysis to understand how geometrical factors (e.g. periodicity, radius, width of the host transmission line, etc) affect the miniaturization performance and quality factor. As a design example, a 2GHz pin loaded hairline filter with 17% -3dB |S21| bandwidth and 1.5dB insertion loss is demonstrated. The footprint size of the filter is ~λ0/16×λ0/9 @ 2GHz and is 45% smaller than its traditional counterpart.
| Identifer | oai:union.ndltd.org:USF/oai:scholarcommons.usf.edu:etd-6559 |
| Date | 05 November 2014 |
| Creators | Gupta, Saurabh |
| Publisher | Scholar Commons |
| Source Sets | University of South Flordia |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Graduate Theses and Dissertations |
| Rights | default |
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