This thesis presents the modeling and fabrication of a new solid-state device meant to be used for digital logic circuits. Most current logic circuits are based on MOSFETs. The new logic device uses some of the same operating principles, but also relies on optical illumination to provide input power. In order to obtain the desired current-voltage behavior of the new device, the Silvaco (Atlas) device simulation was used to give some insight into the correct doping levels in the semiconductor and device geometries. Prototypes were fabricated on p-type silicon wafers using CMOS fabrication processes including oxide growth, photolithography, precise plasma or chemical wet etching, diffusion processes, and thin film evaporation. Electrical measurements were done by using an HP4156 parameter analyzer to measure several output voltage signals at one time while an illuminating the device with laser light. The current-voltage characteristics under different biasing conditions with an optical illumination condition were measured and showed characteristics similar to an nMOS transistor.
| Identifer | oai:union.ndltd.org:BGMYU2/oai:scholarsarchive.byu.edu:etd-2478 |
| Date | 14 July 2008 |
| Creators | Cho, Hanho |
| Publisher | BYU ScholarsArchive |
| Source Sets | Brigham Young University |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Theses and Dissertations |
| Rights | http://lib.byu.edu/about/copyright/ |
Page generated in 0.0023 seconds