This research aims to discuss the integration of an 10/100 Ethernet MAC on a
System-on-a-Programmble-Chip. SOPC is a chip combined with ¡§ASIC¡¨(Application
Specific IC) and ¡§PLD¡¨(Programmable Logic Device). Due to the lower Complexity,
SOPC is suitable for SOC study in academic. In this research, Altera ARM-based
ExcaliburTM SOPC is used and an Opencore 10/100 Ethernet MAC is integrated onto
it. The topic of SOPC architecture, SOPC development flow, bus interface design of
the hardware, driver development and verification strategy of SOPC are discussed.
This work is hopeful to be referable material for school SOPC teaching.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0915106-091412 |
| Date | 15 September 2006 |
| Creators | Lin, Guang-bao |
| Contributors | Chua-Chin Wang, Tien-Fu Chen, Ming-Chao Chiang, Ing-Jer Huang, Shen-Fu Hsiao |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0915106-091412 |
| Rights | restricted, Copyright information available at source archive |
Page generated in 0.0017 seconds