This thesis includes two topics, which are a Self-sampled ALL-MOS ASK Demodulator and a Synchronous DAC with Self-calibration.
An all-MOS ASK demodulator with a wide bandwidth for lower ISM band applications is presented in the first half of this thesis. The chip area is reduced without using any passive element. It is very compact to be integrated in an SOC (system-on-chip) for wireless biomedical applications, particularly in biomedical implants. Because of low area cost and low power consumption, the proposed design is also easily to be integrated in other mobile medical devices. The self-sampled loop with a MOS equivalent capacitor compensation mechanism enlarges the bandwidth, which is more than enough to be adopted in any application using lower ISM bands. To demonstrate this technique, an ASK demodulator prototype is implemented and measured using a TSMC 0.35 £gm standard CMOS process.
The second topic reveals a synchronous DAC with self-calibration. The main idea is to use a calibration circuit to overcome large error of output voltage caused by the variation of the unit capacitor. When DAC is not calibrated, INL is larger than 1.7 LSB. After calibrated, INL is improved to be smaller than 0.5 LSB. To demonstrate this technique, a DAC prototype is implemented and measured using a TSMC 0.18 £gm standard CMOS process.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0629110-123305 |
| Date | 29 June 2010 |
| Creators | Chen, Chih-Lin |
| Contributors | Sying-Jyan Wang, Shen-Fu Hsiao, Chua-Chin Wang, Chih-Peng Li |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629110-123305 |
| Rights | not_available, Copyright information available at source archive |
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