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A Neuron Emulator and Headstage Circuit for Patch Clamp Setups

This thesis presents a neuron emulator and headstage circuit for patch clamp setups and provides simulation, measurement and verification results. The circuit implemented on a printed circuit board (PCB) is battery powered and portable. The emulator provides both passive (resting potential) and active (action potential) electrical properties of a live neuron as seen from a single electrode by using the headstage circuit. It can be used to test electrophysiological equipment such as current-clamp, voltage-clamp or patch-clamp amplifiers. The action potentials (APs) are generated with a voltage-dependent frequency controlled by a microcontroller implementing a firing range from -60 mV to -30 mV and firing frequency from 1 Hz to10 Hz. The charge released by firing the neuron is initially stored on a 110 pC capacitor. Compared to directly using a current or voltage source, this design results in a more realistic simulation of the APs generated by ionic currents in a live neuron. The measured results from a prototype demonstrate that the neuron emulator meets the design specifications and it is capable of performing voltage clamp and rate responsive current clamp functionality. Measured results using a commercial clamp amplifier are provided to confirm the emulator operation in a practical recording environment.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0815112-163439
Date15 August 2012
CreatorsWu, Yen-cheng
ContributorsChung- Yao Kao, Jia-Jin Chen, Robert Rieger, Jih-Ching Chiu
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageEnglish
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0815112-163439
Rightsuser_define, Copyright information available at source archive

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