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A Study of High-Speed Non-Classical Unipolar CMOS with a Thick Sidewall-Spacer Gate-Oxide NMOS Load

In this thesis, we present a high-speed non-classical unipolar CMOS with a thick sidewall-spacer gate-oxide NMOS load. This unipolar CMOS is composed of a NMOS driver and a thick sidewall-spacer gate-oxide NMOS which replaces a PMOS as load. We focus on the investigation of punch-through current in unipolar CMOS trends. In addition, we also design a conventional CMOS for comparison.
According to the simulations, the logical characteristics of our proposed CMOS are valid, in which the average propagation delay time is improved 20 % compared with the conventional CMOS. This is due to the presence of a thick sidewall-spacer gate-oxide NMOS load. For the viewpoint of device fabrication, the N well process can also be eliminated. This means that the proposed NMOS load not only improves the CMOS speed, but also reduces the fabrication cost. Thus, because of the shared-terminal output, the layout area can be significantly decreased 41 %, in comparison with the conventional CMOS.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0725112-111847
Date25 July 2012
CreatorsWang, Shih-Wei
ContributorsJyi-Tsong Lin, James B. Kuo, Pei-Wen Li, Cheewee Liu, Feng-Der Albert Chin
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-111847
Rightsuser_define, Copyright information available at source archive

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