The aim and goal of this work has been to design and implement a voltage reference network for a 12-bit PSAADC, Parallell Successive Analog to Digital Converter. A chip containing the design has been sent away for fabrication. Because of the long processing time, no measurement data are presented. The main specifications for the voltage reference generator is to generate stable reference voltages with low noise and a good PSRR. Efforts has also been made to minimize the power consumption.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-1132 |
| Date | January 2002 |
| Creators | Andersson, Martin |
| Publisher | Linköpings universitet, Institutionen för systemteknik, Institutionen för systemteknik |
| Source Sets | DiVA Archive at Upsalla University |
| Language | Swedish |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
| Relation | LiTH-ISY-Ex, ; 3236 |
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