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Study of High Drivability Word Line Driver and High Speed Sense Amplifier for a Low Voltage Dynamic Random Access Memory

Three high speed circuit schemes for a low supply voltage DRAM are presented in this thesis. First, a high drivability bootstrapped word line driver is proposed. We use one boosting circuit collocating an NMOS to serve as the pulling up device rather than a PMOS to increase the current driving ability of the output stage. When the driving loading is 512 memory cells with the supply voltage of 1.5V, the switching time of the proposed word line driver is 1.13ns faster than that of the conventional one, the switching speed of the word line is 31.1% improved. Second, a pulse-controlled overdriven sense amplifier (PCO-SA) is proposed. We can make use of the pulse width of a pulse generator to control the overdriven time of the sensing transistors thereby enlarging the VGS of the sensing transistors transiently and improving the sensing speed. The sensing speed of the PCO-SA is 4.4ns faster than that of conventional sense amplifier with the supply voltage of 1.5V, the sensing time is 34.1% improved. In addition, even if the supply voltage is decreased to 1.3V, the function of the PCO-SA still correctly, whereas conventional sense amplifier cannot. Third, a modified N&PMOS cross-coupled main amplifier is presented. We make the charging path of speedy circuit which has the ability of passing the full VDD voltage to the input of the second stage. By this way, the data read out speed of the modified main amplifier is 5.87ns faster than that of the conventional N&PMOS cross-coupled main amplifier, the data read out time is 30.4% improved. Finally, three proposed circuits in this thesis are integrated and examined in a 1-Kbit DRAM test circuit. The simulated RAS access time of 28.9ns is achieved with the supply voltage of 1.5V, the RAS access time is 16% improved. These also indicate that the proposed circuit schemes are suitable for application in a low supply voltage DRAM.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0621102-200933
Date21 June 2002
CreatorsWei, Shih-Zung
ContributorsJinn-Shyan Wang, Jyi-Tsong Lin, Chia-Hsiung Kao
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageEnglish
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0621102-200933
Rightsnot_available, Copyright information available at source archive

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