This case is intended to be used in an Strategic Management or Strategic Alliances course to highlight the challenges faced by second tier industry players in a capital intensive industry with complex alliances and increasingly severe industry cycles. The DRAM industry has become an ex-growth highly cyclical industry which requires high amounts of capital expenditure and scale to succeed. Taiwan DRAM companies have been facing unsustainable trends already for sometime as operating cash flows have failed to match capital expenditures even during the good times of the “Tech Bubble” of the late 1990s. The situation of DRAM companies deteriorated in the late 2000s as players over estimated Windows Vista related demand for DRAM and over invested. The situation worsened still further as the Great Recession caused a slump in world wide demand. The situation of Taiwanese DRAM companies was very dire despite the exit of several companies from the industry during the Great Recession. The Taiwanese government attempted to lead a consolidation in the industry but failed as companies lost interest in its proposal due to several reasons and an upturn in the industry cycle. However, the DRAM cycle seemed to play out itself rather quickly as companies once again invested heavily to remain competitive. The investment and still fragile industry led to increased supply, lower prices, and the return of financial difficulties. All the while, the leading players in the industry, mainly Koreans, keep gaining market share and increasing their technological gap versus industry peers. Finally Elpida of Japan apparently prepares another attempt at consolidating the industry. The alliances in the industry constantly change, face challenges, and adapt to each twist and turn in the industry. Despite deepening alliances the fate of Taiwanese DRAM companies appear very bleak. Tough choices will have to be made in the near future as the market seems to head for another down turn while Elpida apparently prepares to make new consolidation/alliance offers. Should the Taiwanese DRAM companies attempt an industry exit such as the one executed by Winbond, should they further deepen their alliances, or just go it alone?

This article focuses on ¡§Floating Body Effect¡¨ of PD-SOI (partial depletion silicon-on-insulator), because the conventional PD-SOI 1T DRAM (one transistor of dynamic random access memory) cell can¡¦t be held impact ionization produced carriers efficiently, so it is unable to provide reliable programming window. In this article, we propose a new device with its special structure, besides adding ¡§Block Oxide¡¨ to the two sides of device body to strengthen ¡§kink effect¡¨, we also add a negative bias to the beneath electrode which is located in the bottom of U-cave of this device, this design can manipulate ¡§kink effect¡¨ more feasibly, and guarantee the hole-held ability. Those points can improve performance of PD-SOI 1T DRAM cell greatly. The new SOI device contains four advantages in the below: 1. Exploiting conventional bulk Si-wafer for manufacture, no expensive SOI wafer needs. 2. Increasing programming window of 1T DRAM cell greatly. 3. Preventing ¡§Pinch off¡¨ occurs in source and drain depletion region. 4. Reducing the junction capacitor of Source-Body and Drain-Body. We use simulation tool, ISE TCAD 10.0 to simulate structure of this new device, and do I-V characteristic electric analyze to this device. In the manufacture, thanks for the equipment and facility of NDL (National Device Laboratory); we apply to this resource to realize our devices.

Abstract Observing the DRAM market, the price of DRAM is changing dramatically. According to SIA announcement that the average price and growth ratio of DRAM compared with year 2002 at same season, it went down 50% in 1998, but bounced up 50% above at same period in 1999. For the year 2000, it was good year for semiconductor, but the DRAM price was went down till July of 2000, the DARM price up with tremendous growth to 70%. Year 2001, it was a recession year for semiconductor, the highest price 8.9 US$ of DRAM in 2000 was on the way down to the lowest 1.69US$ in the end of 2001, 81% down. Although the price of DRAM is down very fast, but it also bounce back quickly and strongly. Year 4th quarter 2002, the DRAM price growth rate higher 1 time compared with 2001. Such kind of this industry(un-predictable) , how the DRAM maker still can survive and maintain high competitive environment and get profit ?? The research of this study are mainly through the DRAM industry structure, strategic competitiveness(Based on structure of the Porter¡¦s Five Forces Analysis, Daimand Theory and Cluster analysis) and strategic alliance to find out how the Taiwan DRAM maker can make profit and how to play a major role under the pressure from the IDM of Japan, German, USA, then propose the KSF(Key Successful Factor) and give the recommendations for Taiwan DRAM maker that will be a foundmental to build up their capability and plan their competitive stratergy.

In this thesis, the reactive rf magnetron sputtering was used to deposit (Ba,Sr)(Ti,Zr)O3 (BSTZ) thin films on Pt/Ti/SiO2/Si substrate with the optimal parameters. The post-treatments of rapid thermal annealing (RTA), conventional thermal annealing (CTA), O2 plasma, N2 plasma, and N2O plasma respectively were used to promote the dielectric characteristics. The physical characteristics of BSTZ thin films were obtained by the analyses of XRD, SEM, and AFM. The influences of post-treatments on thin films were discussed. The electrical properties of BSTZ thin films were estimated through the measurement of leakage current on MIM structure with HP4194A and HP4156C semiconductor parameters analyzer. Also, the dependences of dielectric constants on applied voltage were discussed. After annealing treatments, the dielectric constants were increased and the leakage currents were decreased respectively. But with the higher annealing temperature of CTA, the larger leakage currents were obtained. In the different atmosphere of plasma treatments, the leakage currents were decreased obviously. The dielectric constant was about 295 after O2 plasma treatment of 6 minutes succeeded with RTA at 600¢J for 2 minutes¡F it reveals that the leakage current was about 1.38x10-9 A/cm2 under the applied electrical field of 0.1 MV/cm. Therefore, to combine the annealing and plasma treatments properly could increase the dielectric characteristics effectively.

Conducting polymers have emerged as a class of innovative materials with tunable properties that are useful in a diverse range of applications. For example, the electronic properties and molecular structure of these materials can be modified electrochemically. Reported in 2008, the creation of a conducting polymer hybrid system PPy(Li+DBS-) that exhibits novel time and potential dependent conductivity can be utilized to create dynamic memory. Unlike modern silicon-based devices which are limited by scaling factors such as quantum tunneling, this system is expected to have exceptional scaling properties allowing memory devices to operate down to the low nm range. The work embodied within this thesis describes results based on the scaling properties of PPy(Li+DBS-) from 5 to 45 μm on the potential dependent current transients that are used as a basis for dynamic memory applications. The deviation from theorized conduction systems has led to a thorough understanding of the anisotropic nature of PPy(Li+DBS-) determined through finite elemental simulation methods. The temperature dependence of the system is also studied to verify activation energies associated with carrier and ion mobility.

Conducting polymers have emerged as a class of innovative materials with tunable properties that are useful in a diverse range of applications. For example, the electronic properties and molecular structure of these materials can be modified electrochemically. Reported in 2008, the creation of a conducting polymer hybrid system PPy(Li+DBS-) that exhibits novel time and potential dependent conductivity can be utilized to create dynamic memory. Unlike modern silicon-based devices which are limited by scaling factors such as quantum tunneling, this system is expected to have exceptional scaling properties allowing memory devices to operate down to the low nm range. The work embodied within this thesis describes results based on the scaling properties of PPy(Li+DBS-) from 5 to 45 μm on the potential dependent current transients that are used as a basis for dynamic memory applications. The deviation from theorized conduction systems has led to a thorough understanding of the anisotropic nature of PPy(Li+DBS-) determined through finite elemental simulation methods. The temperature dependence of the system is also studied to verify activation energies associated with carrier and ion mobility.

自美國次級房屋信貸危機爆發後，即便多國中央銀行多次向金融市場注入巨額資金，仍無法阻止這場金融危機。由2008年9月全球股市大崩盤接開序幕，全球股市發生如骨牌般連環暴跌的慘況。道瓊工業指數重挫504點，Nasdaq指數大跌81點，全球股市在美國金融風暴襲擊下應聲倒地。亞洲股市亦紛紛大跌，台股指數當日暴跌295.86點，風暴亦襲捲歐洲國家，冰島瀕臨破產。台灣自然也遭受此波金融風暴的衝擊，股市自9月由6052.45點下跌至10月的4579.62點，不但一個多月內台股指數摜破5000點，跌幅高達24.33% 。 自2007年第一季起，全球DRAM產業開始出現供過於求的狀況，由於產能過剩的問題嚴重，再加上金融海嘯的衝擊市場、韓元劇貶造成韓商殺價求現，導致DRAM價格在兩年內暴跌85%，包括美、日、德、韓和台灣的DRAM廠商，全部陷入巨額虧損、營運現金流出的困局。除了韓國三星電子外，佔有全球70%市場的其它DRAM廠商，都因大幅舉債來擴充產能，而面臨營運現金用罄的窘境。 台灣DRAM產業擁有先進12吋晶圓廠，產能佔全球40%，整體產業影響力巨大，然卻分散為多家公司，導致財務體質較弱，而全球產能過剩問題，更使得台灣DRAM業者困境更加險峻。就長遠考量，DRAM產業的競爭力取決於技術、製造成本、產能及財務實力，目前僅三星擁有全面競爭條件。美、日廠商雖有關鍵技術，但缺乏產能、成本效率及研發所需的龐大資金支持，因此台灣與美、日聯盟，彼此截長補短，有長期互利共生的基礎。過去退出DRAM產業的德儀(TI)、IBM、東芝、日立等世界級公司，每一家也都有自主技術!由此可見，技術自主能力當然重要，但在今日DRAM競爭舞台上，成本優勢、財務實力、經濟規模等因素同樣關鍵，台灣業界能自一片荒蕪中成長壯大，至今國際大廠爭相來台尋求結盟伙伴，自有其競爭條件和能力。 半導體產業之發展現已邁入12吋晶圓之製造，一座全新12吋之晶圓廠投資金額動輒需要新台幣500億以上來建構廠房，購買生產之製造設備，及各種測試儀器，以及製造技術之研發合作。晶圓設備具有下列幾種特性: (1)設備商須具備前瞻製造，技術能力，需投入大量研發經費及完整系統整合 方案。 (2)設備商須與其客戶不斷合作， 協助客戶研發新製程，跨入下一世代製程技 術之領域。 (3)對於主要客戶提供客製化之服務，共同合作開發新世代之設備，以提升其 生產能力，降低成本，提高其獲利。 (4)提供整廠零配件售後服務之平台及軟硬體之整合方案。 由於晶圓製造產業為投資金額高，技術門檻高及高利潤，也間接影響人員素質、技術之研發、智財權之保護及資訊整合的要求 ，遠高於其他中下游產業。設備商如何因應世界整體大環境之劇烈變動及2008年金融海嘯之衝擊，市場供給與需求之不確定性景氣之循環，3C產業之變化、升級，製造技術之演進，DRAM同業之實力消長策略合作及聯盟均值得做深入之研究探討解析。由於本人服務於半導體設備商管理單位逾15年，對此產業有相當程度的了解，藉由實務經驗與理論結合，整理出對此產業有益的資料與趨勢分析，以供實務上的應用及將來前輩先進的參考。本研究之主要目的如下: 一、 對於DRAM產業現況及發展趨勢進行分析，有助於了解影響DRAM價格 漲跌之因素及探討在不同時期DRAM產業模式變遷的因素及相關的競爭優 勢。 二、IC產業位於整個資訊電子產業的最上游，將透過此研究影響半導體相關 產業間共生關係，並透過此關係了解對IC產業的影響，以及日本2011年 311地震對於全球半導體產業之衝擊。

Three high speed circuit schemes for a low supply voltage DRAM are presented in this thesis. First, a high drivability bootstrapped word line driver is proposed. We use one boosting circuit collocating an NMOS to serve as the pulling up device rather than a PMOS to increase the current driving ability of the output stage. When the driving loading is 512 memory cells with the supply voltage of 1.5V, the switching time of the proposed word line driver is 1.13ns faster than that of the conventional one, the switching speed of the word line is 31.1% improved. Second, a pulse-controlled overdriven sense amplifier (PCO-SA) is proposed. We can make use of the pulse width of a pulse generator to control the overdriven time of the sensing transistors thereby enlarging the VGS of the sensing transistors transiently and improving the sensing speed. The sensing speed of the PCO-SA is 4.4ns faster than that of conventional sense amplifier with the supply voltage of 1.5V, the sensing time is 34.1% improved. In addition, even if the supply voltage is decreased to 1.3V, the function of the PCO-SA still correctly, whereas conventional sense amplifier cannot. Third, a modified N&PMOS cross-coupled main amplifier is presented. We make the charging path of speedy circuit which has the ability of passing the full VDD voltage to the input of the second stage. By this way, the data read out speed of the modified main amplifier is 5.87ns faster than that of the conventional N&PMOS cross-coupled main amplifier, the data read out time is 30.4% improved. Finally, three proposed circuits in this thesis are integrated and examined in a 1-Kbit DRAM test circuit. The simulated RAS access time of 28.9ns is achieved with the supply voltage of 1.5V, the RAS access time is 16% improved. These also indicate that the proposed circuit schemes are suitable for application in a low supply voltage DRAM.

ABSTRACT Business loan is an important process and main revenue to bank. Loan asset is crucial in balance sheet. Asset quality is relevant to operating security, so bank should enhance the management and evaluation of loan process to ensure the operating security and performance during making a deal with clients. Sound evaluation model could help related staff evaluate the credit of clients and lower overdue loan ratio. IC industry is always the driving industry in Taiwan. Taiwan DRAM revenue, as a second place leader, accounts for more than 20% of world market. The nature of DRAM industry is huge capital, high technology level, fast price variation and those mean high risks during loan. Banks in Taiwan serve DRAM companies very often. In case of overdue loan, bank will be affected heavily. Thus, bank should build evaluation model of loan to ensure the security of loan. After reviewing related literature, this research identifies key factors of loan decision and invites related bank employees in north Hsin-Chu City to join AHP questionaire. Then this research conducts quantitative analysis through AHP. This research collects 16 bank professionals' opinions. Among 16 there are 6 Consistency Indexes higher than 0.1, so only 10 opinions are accepted. The result shows 3 main factors in loan evaluation: industrial evaluation, financial analysis and loan evaluation (listed in order). Besides, among overall criteria, the most important 5 are expansion of competitors' factory, ability to raise fund, quick ratio, new application, and collateral. This research proposes the following 4 suggestions: 1. Bank should ask professional industrial research institute for DRAM industrial evolution to reduce the credit risk. 2. The ability to raise fund is relevant to whether DRAM companies could get through the recession. Recent cash flow should be paid attention to. 3. The feasibility of capital expenditure plan should be evaluated as project finance and financial planning should be conducted with sensitivity analysis. 4. Risk cost should be considered when setting DRAM loan rate. Ensure return is consistent with the risk.

Large dense structures like DRAMs (Dynamic Random Access Memory) are particularly susceptible to process variation, which can lead to variable latencies in different memory arrays. However, very little work exists on variation studies in DRAMs. This is due to the fact that DRAMs were traditionally placed off-chip and their latency changes due to process variation did not impact the overall processor performance. However, emerging technology trends like three-dimensional integration, use of sophisticated memory controllers, and continued scaling of technology node, substantially reduce DRAM access latency. Hence, future technology nodes will see widespread adoption of embedded DRAMs. This makes process variation a critical upcoming challenge in DRAMs that must be addressed in current and forthcoming technology generations. In this paper, techniques for modeling the effect of random, as well as spatial variation, in large DRAM array structures are presented. Sensitivity-based gate level process variation models combined with statistical timing analysis are used to estimate the impact of process variation on the DRAM performance and leakage power. A simulated annealing-based Vth assignment algorithm using adaptive body biasing is proposed in this thesis to improve the yield of DRAM structures. By applying the algorithm on a 1GB DRAM array, an average of 14.66% improvement in the DRAM yield is obtained.