Three high speed circuit schemes for a low supply voltage DRAM are presented in this thesis. First, a high drivability bootstrapped word line driver is proposed. We use one boosting circuit collocating an NMOS to serve as the pulling up device rather than a PMOS to increase the current driving ability of the output stage. When the driving loading is 512 memory cells with the supply voltage of 1.5V, the switching time of the proposed word line driver is 1.13ns faster than that of the conventional one, the switching speed of the word line is 31.1% improved. Second, a pulse-controlled overdriven sense amplifier (PCO-SA) is proposed. We can make use of the pulse width of a pulse generator to control the overdriven time of the sensing transistors thereby enlarging the VGS of the sensing transistors transiently and improving the sensing speed. The sensing speed of the PCO-SA is 4.4ns faster than that of conventional sense amplifier with the supply voltage of 1.5V, the sensing time is 34.1% improved. In addition, even if the supply voltage is decreased to 1.3V, the function of the PCO-SA still correctly, whereas conventional sense amplifier cannot. Third, a modified N&PMOS cross-coupled main amplifier is presented. We make the charging path of speedy circuit which has the ability of passing the full VDD voltage to the input of the second stage. By this way, the data read out speed of the modified main amplifier is 5.87ns faster than that of the conventional N&PMOS cross-coupled main amplifier, the data read out time is 30.4% improved. Finally, three proposed circuits in this thesis are integrated and examined in a 1-Kbit DRAM test circuit. The simulated RAS access time of 28.9ns is achieved with the supply voltage of 1.5V, the RAS access time is 16% improved. These also indicate that the proposed circuit schemes are suitable for application in a low supply voltage DRAM.

Analytical models of wood-frame shear walls and diaphragms for use in monotonic, quasi-static (cyclic), and dynamic analyses are developed in this thesis. A new analytical model is developed to accurately represent connections between sheathing panels and wood framing members (sheathing-to-framing connections) in structural analysis computer programs. This new model represents sheathing–to–framing connections using an oriented pair of nonlinear springs. Unlike previous models, the new analytical model for sheathing-to-framing connections is suitable for both monotonic, cyclic, or dynamic analyses. Moreover, the new model does not need to be scaled or adjusted. The new analytical model may be implemented in a general purpose finite element program, such as ABAQUS, or in a specialized structural analysis program, such as CASHEW. The analytical responses of several shear walls and diaphragms employing this new model are validated against measured data from experimental testing. A less complex analytical model of shear walls and diaphragms, QUICK, is developed for routine use and for dynamic analysis. QUICK utilizes an equivalent single degree of freedom system that has been determined using either calibrated parameters from experimental or analytical data, or estimated sheathing-to-framing connection data. Application of the new analytical models is illustrated in two applications. In the first application, the advantages of diaphragms using glass fiber reinforced polymer (GFRP) panels in conjunction with plywood panels as sheathing (hybrid diaphragms) are presented. In the second application, the response of shear walls with improperly driven (overdriven)nails is determined along with a method to estimate strength reduction due to both the depth and the percentage of total nails overdriven.