This thesis presents a 2.4GHz image-reject downconverter fabricated in TSMC 0.25 1P5M CMOS process. The integrated active filter can not only filter out the image signal, but also reduce noise figure degraded by parasitic capacitance in the circuit. The differential LC oscillator fabricated in TSMC 0.35 1P4M CMOS process has properties of low phase noise and wide frequency turning range. Finally, a variable gain amplifier implemented in GCS GaAs HBT process was designed using signal summing architecture. The architecture is advantageous to reducing noise, distortion and increasing operating frequency. This thesis has studied what cause the difference between measurement and simulation for better performance in the future design.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0724102-101141 |
| Date | 24 July 2002 |
| Creators | Pu, Ta-Chun |
| Contributors | Sheng-Fuh Chang, Tzyy-Sheng Horng, Huey-Ru Chuang |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0724102-101141 |
| Rights | off_campus_withheld, Copyright information available at source archive |
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