The design of mixed-signal integrated circuits has evolved from simple analog and
digital circuits operating on the same silicon substrate to the point that now we
have complete system on a chip solutions for communication systems. The levels of
integration needed to remain cost effective in today's integrated circuit (IC) market
require careful use of all the available die space. The current trend of digital to
analog converter (DAC) design has focused on maximizing speed and linearity for
high performance telecommunications systems. The circuit design methods used to
achieve very high sample rates require the use of large amounts of die space.
This thesis presents a 10-bit DAC that has been optimized for area, while still
maintaining accurate operation at low frequencies. To achieve 10-bit performance,
an ultra high gain op-amp is introduced for various servoing applications in the
DAC. The architecture chosen for the DAC will show an optimization of required
die size and performance when compared to other architectures. The DAC was
fabricated in a standard digital 0.18 μm CMOS process. The DAC occupies 0.0104
mm² (110 μm x 94 μm), and only consumes 2.8 mW of power. In addition to the
10-bit DAC, a design is presented for a 13-bit DAC which occupies 0.020 mm², and
requires only the addition of a minimum number of devices to the 10-bit DAC. / Graduation date: 2002
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/30129 |
| Date | 31 May 2001 |
| Creators | Greenley, Brandon Royce |
| Contributors | Moon, Un-Ku |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
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