<p>In the European research projects SIAM and 100GET, building blocks for 100Gbit Ethernet optical link have been implemented. Data are sent from a computer, modulated, converted to analog, mixed onto the RF-band, sent through an optical link, down-mixed, converted back to digital, demodulated and sent to a receiving computer. Signal Processing Devices Sweden AB is contributing to this project by their implementation PANDA. This thesis has been to study, as a proof of concept, and implement a prototype of PANDA as the component converting from digital to analog signal, the DAC, in 65nm SOI CMOS technology.</p><p>The idea of the system is to use the concept of time interleaving, where two or more components interact by performing the same operations on a different set of data, ideally scaling the performance linearly with the amount of components used.</p><p>This report presents design, implementation and verification at simulation level. It includes interfacing with off-chip components in low voltage specifications, clock generation, filtering and current-steered switches.</p>
| Identifer | oai:union.ndltd.org:UPSALLA/oai:DiVA.org:liu-51632 |
| Date | January 2009 |
| Creators | Hägglund, Joel |
| Publisher | Linköping University, Linköping University, Electronics System |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, text |
Page generated in 0.0018 seconds