A DMA Controller can offload a processor tremendously. A memory copy operation can be initiated by the processor and while the processor executes others tasks the memory copy can be fulfilled by the DMA Controller. An implementation of a DMA Controller for use in LEON3 SoC:s has been made during this master thesis. Problems that occurred while designing a controller of this type concerned AMBA buses, data transfers, alignment and interrupt handling. The DMA Controller supports AMBA and is attached to an AHB master and APB slave. The DMA Controller supports burst transfers to maximize data bandwidth. The source and destination address can be arbitrarily aligned. It supports multiple channels and it has interrupt generation on transfer completion along with interrupt masking. The implemented functionality works as intended.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-93687 |
| Date | January 2013 |
| Creators | Nilsson, Emelie |
| Publisher | Linköpings universitet, Datorteknik, Linköpings universitet, Tekniska högskolan |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
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