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DRAM-aware prefetching and cache management

Main memory system performance is crucial for high performance microprocessors.
Even though the peak bandwidth of main memory systems has increased
through improvements in the microarchitecture of Dynamic Random Access Memory
(DRAM) chips, conventional on-chip memory systems of microprocessors do
not fully take advantage of it. This results in underutilization of the DRAM system,
in other words, many idle cycles on the DRAM data bus. The main reason for this
is that conventional on-chip memory system designs do not fully take into account
important DRAM characteristics. Therefore, the high bandwidth of DRAM-based
main memory systems cannot be realized and exploited by the processor.


This dissertation identifies three major performance-related characteristics
that can significantly affect DRAM performance and makes a case for DRAM
characteristic-aware on-chip memory system design. We show that on-chip memory
resource management policies (such as prefetching, buffer, and cache policies)
that are aware of these DRAM characteristics can significantly enhance entire system
performance. The key idea of the proposed mechanisms is to send out to the
DRAM system useful memory requests that can be serviced with low latency or in
parallel with other requests rather than requests that are serviced with high latency or serially. Our evaluations demonstrate that each of the proposed DRAM-aware
mechanisms significantly improves performance by increasing DRAM utilization
for useful data. We also show that when employed together, the performance benefit
of each mechanism is achieved additively: they work synergistically and significantly
improve the overall system performance of both single-core and Chip
MultiProcessor (CMP) systems. / text

Identiferoai:union.ndltd.org:UTEXAS/oai:repositories.lib.utexas.edu:2152/ETD-UT-2010-12-2492
Date11 February 2011
CreatorsLee, Chang Joo, 1975-
Source SetsUniversity of Texas
LanguageEnglish
Detected LanguageEnglish
Typethesis
Formatapplication/pdf

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