In contemporary communication systems, Digital-to-Analog Converters (DAC), Signal Defined Radio (SDR) signal creation, and clock data recovery are essential components. DACs convert digital signals to analog signals, creating continuous waveforms. DACs provide versatility in the transmission of SDR by supporting a range of communication protocols. Clock data recovery enables precise signal recovery and synchronization at the receiver end. These elements work together to provide effective and high-quality communication systems across several sectors. With the development of quantum computing, these SDR systems also find extensive use in generating precisely timed signals for controlling components of a quantum computer and also for read-out operations from various specialized instruments. This thesis demonstrates an FPGA (Xilinx vcu118) with a DAC (Analog Devices AD9081) platform. It employs SDR for generating of periodic signals and also stream of bits which are then recovered using a simple Clock Data Recovery technique. The signal integrity of the generated signals and error-rate from the proposed Clock Data Recovery technique is also analyzed. / Master of Science / Communication systems in our networked world depend on key technologies to provide dependable connectivity. By converting digital data into continuous waveforms, Digital-to- Analog Converters (DACs) serve a crucial role in enabling the generation of various analog signals. This makes it possible for Software-Defined Radio (SDR) to produce a variety of modulated signals and enables smooth communication between various hardware and software systems. The Clock and Data Recovery (CDR) algorithms correct for clock fluctuations and phase offsets to provide precise signal recovery and synchronization. Together, these technologies improve communication networks' effectiveness and dependability, allowing seamless connectivity and enhancing our networked experiences. This thesis presents an SDR platform comprising Xilinx FPGA vcu118 and Analog Devices high-speed DAC/ADC AD9081. A CDR algorithm is also proposed to recover data from the signals generated by the DAC, and its effectiveness and error rate is also analyzed.
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/116004 |
| Date | 08 August 2023 |
| Creators | Choudhury, Aakash |
| Contributors | Electrical and Computer Engineering, Shao, Linbo, Xiong, Wenjie, Jia, Xiaoting |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Thesis |
| Format | ETD, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
Page generated in 0.0691 seconds