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Design of platform for exploring application-specific NoC architecture.

Liu, Zhouyi. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2011. / Includes bibliographical references (leaves 110-114). / Abstracts in English and Chinese. / ABSTRACTS --- p.I / 摘要 --- p.II / CONTENTS --- p.III / LIST OF FIGURE --- p.V / LIST OF TABLE --- p.VI / ACKNOWLEDGEMENT --- p.VII / Chapter CHAPTER 1 --- INTRODUCTION --- p.1 / Chapter 1.1 --- NETWORK-ON-CHIP --- p.1 / Chapter 1.2 --- RELATED WORKS --- p.2 / Chapter 1.3 --- PLATFORM OVERVEW --- p.6 / Chapter 1.4 --- AUTHOR'S CONTRIBUTION --- p.10 / Chapter CHAPTER 2 --- NOC LIBRARY --- p.12 / Chapter 2.1 --- NETWORK TERMINOLOGY --- p.12 / Chapter 2.2 --- BASIC STRUCTURE --- p.15 / Chapter 2.3 --- LOW-POWER ORIENTED ARCHITECTURE --- p.20 / Chapter 2.3.1 --- Low-Cost Allocator Design --- p.21 / Chapter 2.3.2 --- Clock Gating --- p.22 / Chapter 2.3.3 --- Express Virtual Channel Insertion --- p.22 / Chapter 2.4 --- LOW-LATENCY ORIENTED ARCHITECTURE --- p.28 / Chapter 2.4.1. --- Lookahead Bypass Scheme --- p.29 / Chapter 2.4.2. --- Lookahead Bypass Router Architecture --- p.29 / Chapter CHAPTER 3 --- BENCHMARK AND MEASUREMENT --- p.31 / Chapter 3.1 --- BENCHMARK GENERATION --- p.32 / Chapter 3.1.1 --- Types of Traffic Patterns --- p.32 / Chapter 3.1.2 --- Traffic Generator --- p.36 / Chapter 3.2 --- MEASUREMENT SETTING --- p.38 / Chapter 3.2.1 --- Warming-up Period. --- p.38 / Chapter 3.2.2 --- Latency Definition --- p.39 / Chapter 3.2.3 --- Throughput Definition --- p.40 / Chapter 3.2.4 --- Virtual Channel Utilization --- p.40 / Chapter CHAPTER 4 --- PLATFORM STRUCTURE --- p.41 / Chapter 4.1 --- FILE TREE --- p.42 / Chapter 4.1.1 --- System Files --- p.46 / Chapter 4.1.2 --- Low-Power NoC Related --- p.47 / Chapter 4.1.3 --- Low-Latency NoC Related --- p.50 / Chapter 4.1.4 --- Project Related --- p.51 / Chapter 4.2 --- PROCESSES --- p.52 / Chapter 4.3 --- GUI ACCESS --- p.56 / Chapter 4.3.1 --- Section 1: Project Setup --- p.58 / Chapter 4.3.2 --- Section 2-a: Low-Power Router Structure --- p.59 / Chapter 4.3.3 --- Section 2-b: Low-Latency Router Structure --- p.60 / Chapter 4.3.4 --- Section 3: Benchmark & Measurement --- p.60 / Chapter 4.3.5 --- Section 4: View Result --- p.62 / Chapter 4.3.6 --- Low-Power NoC Example --- p.62 / Chapter CHAPTER 5 --- OPTIMIZATION AND COMPARISON --- p.72 / Chapter 5.1 --- OPTIMIZATION TECHNIQUE --- p.72 / Chapter 5.1.1 --- Optimization Phase 1: Inactive Buffer Removal --- p.73 / Chapter 5.1.2 --- Optimization Phase 2: Infighting Analysis --- p.74 / Chapter 5.1.3 --- Over-Optimization --- p.75 / Chapter 5.1.4 --- Optimization Example --- p.79 / Chapter 5.2 --- NOCS COMPARISON --- p.83 / Chapter 5.3 --- LOW-POWER IMPLEMENTATION CODE EXPORT --- p.88 / Chapter CHAPTER 6 --- SUMMARY AND FUTURE WORK --- p.92 / Chapter 6.1. --- SUMMARY --- p.92 / Chapter 6.2. --- FUTURE WORK --- p.93 / REFERENCES --- p.95

Identiferoai:union.ndltd.org:cuhk.edu.hk/oai:cuhk-dr:cuhk_327429
Date January 2011
ContributorsLiu, Zhouyi., Chinese University of Hong Kong Graduate School. Division of Electronic Engineering.
Source SetsThe Chinese University of Hong Kong
LanguageEnglish, Chinese
Detected LanguageEnglish
TypeText, bibliography
Formatprint, vii, 114 leaves : ill. ; 30 cm.
RightsUse of this resource is governed by the terms and conditions of the Creative Commons “Attribution-NonCommercial-NoDerivatives 4.0 International” License (http://creativecommons.org/licenses/by-nc-nd/4.0/)

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