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Hardware Architecture of an XML/XPath Broker/Router for Content-Based Publish/Subscribe Data Dissemination Systems

The dissemination of various types of data faces ongoing challenges with the growing
need of accessing manifold information. Since the interest in content is what drives
data networks, some new technologies and thoughts attempt to cope with these challenges
by developing content-based rather than address-based architectures. The Publish/
Subscribe paradigm can be a promising approach toward content-based data dissemination,
especially that it provides total decoupling between publishers and subscribers.
However, in content-based publish/subscribe systems, subscriptions are expressive and
the information is often delivered based on the matched expressive content - which may
not deeply alleviate considerable performance challenges.
This dissertation explores a hardware solution for disseminating data in content-based
publish/subscribe systems. This solution consists of an efficient hardware architecture
of an XML/XPath broker that can route information based on content to either other
XML/XPath brokers or to ultimate users. A network of such brokers represent an overlay
structure for XML content-based publish/subscribe data dissemination systems. Each
broker can simultaneously process many XPath subscriptions, efficiently parse XML
publications, and subsequently forward notifications that result from high-performance
matching processes. In the core of the broker architecture, locates an XML parser that
utilizes a novel Skeleton CAM-Based XML Parsing (SCBXP) technique in addition to an
XPath processor and a high-performance matching engine. Moreover, the broker employs
effective mechanisms for content-based routing, so as subscriptions, publications, and
notifications are routed through the network based on content.
The inherent reconfigurability feature of the broker’s hardware provides the system
architecture with the capability of residing in any FPGA device of moderate logic density.
Furthermore, such a system-on-chip architecture is upgradable, if any future hardware
add-ons are needed. However, the current architecture is mature and can effectively be
implemented on an ASIC device.
Finally, this thesis presents and analyzes the experiments conducted on an FPGA
prototype implementation of the proposed broker/router. The experiments tackle tests
for the SCBXP alone and for two phases of development of the whole broker. The
corresponding results indicate the high performance that the involved parsing, storing,
matching, and routing processes can achieve.

Identiferoai:union.ndltd.org:uottawa.ca/oai:ruor.uottawa.ca:10393/30660
Date January 2014
CreatorsEl-Hassan, Fadi
ContributorsIonescu, Dan
PublisherUniversité d'Ottawa / University of Ottawa
Source SetsUniversité d’Ottawa
LanguageEnglish
Detected LanguageEnglish
TypeThesis

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