The battery driven nature of wireless sensor networks, combined with the need of extended
lifetime mandates that energy efficiency is a metric with high priority. In the current thesis
we explore and compare the energy dissipation of di fferent processor architectures and how
it is associated with performance and area requirements. The processor architectures are
di erentiated based on the datapath length (16-bit, 32-bit, 64-bit and 128-bit) and the
corresponding size of the data memories. Our study focuses on AES algorithm, and the
indicated processor architectures support AES forward encryption, CCM (32/64/128),
CBC (32/64/128) and CTR common modes of operation. In each processor architecture
the instruction set is extended to increase the efficiency of the system. / -
| Identifer | oai:union.ndltd.org:upatras.gr/oai:nemertes:10889/3905 |
| Date | 01 November 2010 |
| Creators | Τσεκούρα, Ιωάννα |
| Contributors | Γκούτης, Κωνσταντίνος, Γκούτης, Κωνσταντίνος, Κουφοπαύλου, Οδυσσέας, Νικολός, Δημήτριος |
| Source Sets | University of Patras |
| Language | English |
| Detected Language | English |
| Type | Thesis |
| Rights | 0 |
| Relation | Η ΒΚΠ διαθέτει αντίτυπο της διατριβής σε έντυπη μορφή στο βιβλιοστάσιο διδακτορικών διατριβών που βρίσκεται στο ισόγειο του κτιρίου της. |
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