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No description available.

Microstrip patch antennas are the most common type of printed antenna due to a myriad of advantages which encourage use in a wide range of applications such as: wireless communication, radar, satellites, remote sensing, and biomedicine. An initial design for a stacked-patch, broadband, dual-polarized, aperture-fed antenna is tested, and some adjustments are made to improve performance. The design goal is to obtain a 3 GHz bandwidth centered at 10 GHz for each polarization. Once the single-element design is finalized, it is used in a 4x1 array configuration. An array increases the gain, and by utilizing variable phase-shifters to each element, the pattern can be electronically steered in a desired direction. The phase-can be easily adjusted. The result of this new phased array design is a wide bandwidth system with dual-polarization which can be electronically steered. Rectennas (rectifying antennas) are used in wireless power transmission (WPT) systems to collect microwave power and convert this power into useable DC power. They find use in many areas such as space power transmission, RFID tags, wireless sensors, and recycling ambient microwave energy. The ability to simulate rectenna designs will allow for an easier method of analysis and tuning without the time and expense of repetitive fabrication and measurement. The most difficult part of rectenna simulation is a good diode model, and since different diodes have dissimilar properties, a model must be specific to a particular diode. Therefore, a method of modeling an individual diode is the most critical part of rectenna simulation. A diode modeling method which is based on an equivalent circuit and compatible with harmonic balance simulation is developed and presented. The equivalent circuit parameters are determined from a series of S-parameter measurements, and the final model demonstrates S-parameters in agreement with the measured data. An aperture-coupled, high-gain, single-patch rectenna is also designed and measured. This rectenna is modeled using the presented method, and the simulation shows good agreement with the measured results. This further validates the proposed modeling technique.

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During storage of grain, there may have significant damage to its quality due to unfavorable physical and biological interactions and thus requires continuous monitoring. Therefore, an easy, cost-effective and environmentally friendly method is necessary for efficient monitoring of stored-grain. Arrays of sensors are being used for classifying liquors, perfumes, quality of food products mimicking mammalian olfactory systems. Monitoring of stored grain is a new application of sensor arrays. The main objective was to fabricate a carbon black polymer sensor array which can easily monitor incipient grain spoilage by detecting spoiling stored grain volatiles (benzene derivatives and aliphatic hydrocarbon derivatives) with minimum interference from relative humidity. Various aspects of a good sensor were analyzed using statistical analysis (RSD, LDA, PCA, t-test). The developed sensor array can identify red flour beetle-infected and uninfected wheat and fungal volatiles at ambient conditions as well as some stored grain conditions (MC 16%, RH 52%).

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No description available.

The performance of a planar Frequency Selective Surface (FSS) cannot be changed or adapted once the manufacturing process has been completed. In practice, however, it would be advantageous to be able to do so, in order to increase flexibility of performance in multiband systems for example. This thesis examines a novel electromagnetict echniquet hat has beend eveloped,w hereby the frequencya nd/or the angular response of FSS's can be tuned in situ over a wide range of frequencies and/or steering angles. The technique employed is passive and relies upon the displacemento f closely separated( and therefore closely coupled) arrays with respect to each other. A global loading of the array results so that the reconfigurable FSS (RFSS) will produce a broadband and/or multibeam response without altering the individual array design. The experience and understanding gained during this work was subsequently used to produce FSS responses of extreme angular stability. In this case a static, double layer structure has been used to make use of the high coupling between the layers i.e. two FSS's printed on a single dielectric substrate to form a close coupled FSS (CCFSS). It was found that the coupling between the two layers was highly dependent on the relative displacement between arrays. This displacement is introduced statically during the manufacture of the FSS. The cases described use two identical layers. A further development of this concept makes use of complementary conducting and aperture elements giving rise to a complementary FSS (CFSS). The CFSS is also manufactured on a common dielectric and produces ultra stable resonant frequencies for both TE and TM oblique incidences. Theoretical verification of the measured results has been achieved, and the measured and predicted results agreed very closely. Modal analysis, using a novel coupled integral equation technique, has been used to predict the response of the RFSS and CFSS. The correlation between the predicted and measured transmission response of the RFSS was very good and it was discovered that operational stability of the bandwidths and band spacing ratios were significantly improved over conventional static FSS.

Small Cell Lung Cancer (SCLC) is a very aggressive neuroendocrine tumour of the lung, which demonstrates a 5 year survival of only 10% for extensive stage disease (20-30% for limited stage), with only modest improvement over the last few decades. Identification of new molecular diagnostic and therapeutic targets is thus imperative. Previous efforts in identifying molecular changes in SCLC by gene expression profiling using microarrays have facilitated disease classification but yielded very limited information on SCLC biology. Previous DNA studies have been successful in identifying several loci important to SCLC. However the low resolution of conventional chromosomal Comparative Genomic Hybridization (CGH) has limited the findings to large chromosomal regions with only a few specific candidate genes discovered to date. Thus, to further understand the biological behaviour of SCLC, better methods for studying the genomic alterations in SCLC are necessary. This thesis highlights the development of array CGH technology for the high resolution dissection of aneuploidy in cancer genomes and the application of this new technology to the study of SCLC. I present the development of the first whole genome CGH array which offered unprecedented resolution in the profiling of cancer genomes allowing fine mapping of genes in a single experiment. Through application of DNA based analysis in conjunction with integrated expression analysis and comparison of SCLC to less aggressive non-small cell lung tumours I have identified novel patterns of pathway disruption specific to SCLC. This included alteration to Wnt pathway members and striking patterns of cell cycle activation through predominantly downstream disruption of signalling pathways including direct activation of the E2F transcription factors, which are normally repressed by the Rb gene. Analysis of targets of the E2F/Rb pathway identified EZH2 as being specifically hyper-activated in SCLC, compared to NSCLC. EZH2 is a polycomb group gene involved in the control of many cellular functions including targeted DNA methylation and escape from senescence in hematopoietic stem cells. Taken together these results suggest that in SCLC, downstream disruption may replace multiple upstream alterations leading to activation independent of a specific mitogenic pathway, and that EZH2 represents a potentially important therapeutic target.

Current approaches to supporting module-based FPGA reconfiguration focus on various aspects and sub-problems in the area but do not combine to form a coherent, top-down methodology that factors low-level device parameters into every step of the design flow. This thesis proposes such a top-down methodology from application specification to low-level implementation, centered around examining the problem of generating a point-to-point communications infrastructure to support the changing interfaces of dynamically placed modules. Low-level implementation parameters are considered at every stage to ensure that area, timing and budget constraints of the application are met. The approach advocates the regular layout of modules surrounded by a wiring harness supporting the communications for those modules, and thus provides an advanced understanding of how to implement the "fixed wiring harness" model of reconfigurable computing proposed by Brebner. Results have shown that compared to flattened net lists the regularity of the layout does not impose significant overheads on critical path delays. At high communication densities it can even result in lower delays. The core of the methodology is an infrastructure generation process that allocates modules to slots and merges configuration graphs to form wiring harnesses that support the communications for these merged configurations. This thesis suggests methods and evaluates algorithms for configuration graph merging so as to reduce run-time reconfiguration overheads. Initial experiments with a greedy merging algorithm performed on an optical flow application resulted in a substantial reduction of 64% in reconfiguration time. The effects of graph merging with the initial greedy algorithm and an improved dynamic programming algorithm were explored for a range of device sizes and architectural parameters. Results show that configuration merging using the greedy method results in significant reductions to the reconfiguration delay. The dynamic programming algorithm provides consistent improvements above and beyond the savings provided by the greedy method. In addition, a strong correlation was identified between the quality of front-end design activities such as partitioning and the effectiveness of back-end implementations. The methodology is integrated into the Xilinx commercial tool flow for partial reconfiguration, and is effective for implementing applications for module-based FPGA reconfiguration where the modules and their communications requirements are known at design time. It also allows a system designer to consider alternate device sizes and parameters until a set is found that satisfies the application constraints.