Architectural research for Field-Programmable Gate Arrays (FPGAs) tends to use an experimental approach. The benchmark circuits are used not only to compare different architectures, but also to ensure that the FPGA is sufficiently flexible to implement the desired variety of circuits. The most common benchmark circuits used for architectural research are circuits from the Microelectronics Center of North Carolina (MCNC). These circuits are small; they occupy less than 3% [5] of the largest available commercial FPGA. Moreover, these circuits are more representative of the glue logic circuits that were targets of early devices. This contrasts with the trend towards implementing Systems on Chip (SoCs) on FPGAs where several functional modules are integrated into a single circuit which is mapped onto one device. In this thesis, we develop a synthetic system-level circuit generator that connects pre-existing circuits in a realistic manner to build large netlists that share the characteristics of real SoC circuits. This generator is based on a survey of contemporary circuit designs from industrial and academic sources. We demonstrate that these system-level circuits scale well and that their post-routing characteristics match the results of large pre-existing benchmarks better than the results of circuits from previous synthetic generators.

L'émergence des contenus multimédias sur Internet, l'accès aux contenus multimédias et leurs enrichissements constituent un vaste domaine de recherche. Cette thèse s'inscrit dans ce contexte, et présente la réalisation complète et opérationnelle d'une plate-forme de diffusion multimédia interopérable et ouverte. Après avoir spécifié l'architecture de la plate-forme en introduisant le support de tous types de médias, l'indexation efficace, la recherche de contenus et leurs visualisations en ligne, la première contribution de cette thèse est une extension de la norme MPEG 7 permettant d'assurer la gestion des contenus graphiques 3D, ainsi que des informations liées à un système multimédia. Cette extension a permis le développement d'une plate-forme de diffusion gérant tous types de contenus, appelée MyMultimédiaWorld.com, entièrement normalisée à l'aide de MPEG 7 et MPEG 4. La deuxième contribution porte sur les facilités d'accès à la plate-forme multimédia. D'une part, nous avons développé une solution simple et originale d'API d'accès aux contenus multimédia par de applications tierces. D'autre part, nous proposons une solution basée sur le principe d'API pour intégrer dans une plate-forme des algorithmes multimédias. Cette solution permet la création de nouveaux services à partir d'algorithmes externes. A partir des deux APIs, nous proposons une nouvelle approche pour l'évaluation automatique d'algorithmes multimédias. Les aspects clés de cette approche sont l'évaluation en ligne, des conditions identiques pour l'exécution des algorithmes et la mise à jour automatique des résultats. L'approche développée est démontrée à l'aide de deux benchmarks différents, le premier pour l'évaluation des algorithmes de compression de maillage 3D et le second pour le benchmark des descripteurs de formes 3D développé dans le cadre des projets FAME2 et POPS du pôle de compétitivité System@tic. Les avantages de cette approche ont été reconnus récemment par le comité de normalisation MPEG avec sa décision d'adopter www.MyMultimédiaWorld.com pour l'évaluation des algorithmes de compression de maillage 3D.

Universiẗat, Diss., 2002--Karlsruhe.

Master-Arbeit Univ. St. Gallen, 2008.

Essen, University, Diss., 2005--Duisburg.

Techn. Hochsch., Diss., 2005--Aachen.

No description available.

Submitted by Lucelia Lucena (lucelia.lucena@ufpe.br) on 2015-03-06T17:22:54Z No. of bitstreams: 2 DISSERTAÇÃO Bruno Edson Martins de Albuquerque Filho.pdf: 4020784 bytes, checksum: 772f84ef1cd45cc696672db6764be3ab (MD5) license_rdf: 1232 bytes, checksum: 66e71c371cc565284e70f40736c94386 (MD5) / Made available in DSpace on 2015-03-06T17:22:54Z (GMT). No. of bitstreams: 2 DISSERTAÇÃO Bruno Edson Martins de Albuquerque Filho.pdf: 4020784 bytes, checksum: 772f84ef1cd45cc696672db6764be3ab (MD5) license_rdf: 1232 bytes, checksum: 66e71c371cc565284e70f40736c94386 (MD5) Previous issue date: 2014-02-05 / Alguns benchmarks foram propostos para auxiliar o projeto de testes de desempenho em DW (Data Warehouse). Entretanto, foi identificada a falta de um benchmark para serviços de análises (OLAP – On-line Analytical Processing). Assim, esta dissertação apresenta a especificação e análise experimental do benchmark OBAS (OLAP Benchmark for Analysis Services). Este benchmark corresponde a uma extensão do Star Schema Benchmark (SSB) (O'Neil et al., 2009), para avaliação de serviços de análises e utilização de consultas escritas na linguagem MDX (Multidimensional Expressions). Na sua especificação, são apresentadas configurações de execução, como utilização de cache, localidade, paralelismo, serviços e catálogos. Foram definidos o esquema relacional e multidimensional correspondente, e as consultas SQL (Structured Query Language) do SSB traduzidas para MDX, além de serem adicionadas novas consultas que avaliam funções OLAP na linguagem MDX. As métricas utilizadas consistem no tempo de resposta, taxas de execução e confiabilidade. Esta última constitui um diferencial na avaliação, pois o SSB apresenta apenas taxas de execução. Componentes são especificados para preparação e execução do OBAS. Foi desenvolvida uma ferramenta de testes para a execução do OBAS de forma portável, que utiliza XMLA (XML for Analysis) como forma de comunicação com os serviços de análises. O OBAS também foi aplicado a uma base de dados real, com as devidas alterações. Dois serviços de análises foram avaliados na análise experimental do OBAS. Os resultados da execução foram tratados e analisados em relação à funcionalidade e complexidade das consultas, e à carga submetida, que consiste no número de fluxos concorrentes de execução, em vez de apresentar um único número como resultado do experimento, o que perde detalhes do comportamento dos serviços. Assim, é possível avaliar o comportamento do serviço diante destes aspectos e identificar a melhor utilização de cada serviço.

Architectural research for Field-Programmable Gate Arrays (FPGAs) tends to use an experimental approach. The benchmark circuits are used not only to compare different architectures, but also to ensure that the FPGA is sufficiently flexible to implement the desired variety of circuits. The most common benchmark circuits used for architectural research are circuits from the Microelectronics Center of North Carolina (MCNC). These circuits are small; they occupy less than 3% [5] of the largest available commercial FPGA. Moreover, these circuits are more representative of the glue logic circuits that were targets of early devices. This contrasts with the trend towards implementing Systems on Chip (SoCs) on FPGAs where several functional modules are integrated into a single circuit which is mapped onto one device. In this thesis, we develop a synthetic system-level circuit generator that connects pre-existing circuits in a realistic manner to build large netlists that share the characteristics of real SoC circuits. This generator is based on a survey of contemporary circuit designs from industrial and academic sources. We demonstrate that these system-level circuits scale well and that their post-routing characteristics match the results of large pre-existing benchmarks better than the results of circuits from previous synthetic generators. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

A collection of benchmark examples is presented for the numerical solution of continuous-time algebraic Riccati equations. This collection may serve for testing purposes in the construction of new numerical methods, but may also be used as a reference set for the comparison of methods.