The design of mineral processing circuits is a complex, open-ended process.  While several tools and methodologies are available, extensive data collection accompanied with trial-and-error simulation are often the predominant technical measures utilized throughout the process.  Unfortunately, this approach often produces sub-optimal solutions, while squandering time and financial resources.  This work proposes several new and refined methodologies intended to assist during all stages of circuit design.  First, an algorithm has been developed to automatically determine circuit analytical solutions from a user-defined circuit configuration.  This analytical solution may then be used to rank circuits by traditional derivative-based linear circuit analysis or one of several newly proposed objective functions, including a yield indicator (the yield score) or a value-based indicator (the moment of inertia). Second, this work presents a four-reactor flotation model which considers both process kinetics and machine carrying capacity.  The simulator is suitable for scaling laboratory data to predict full-scale performance.  By first using circuit analysis to reduce the number of design alternatives, experimental and simulation efforts may be focused to those configurations which have the best likelihood of enhanced performance while meeting secondary process objectives.  Finally, this work verifies the circuit analysis methodology through a virtual experimental analysis of 17 circuit configurations.  A hypothetical electrostatic separator was implemented into a dynamic physics-based discrete element modeling environment.  The virtual experiment was used to quantify the selectivity of each circuit configuration, and the final results validate the initial circuit analysis projections. / Ph. D.

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This thesis report presents system specification, such as frequency and output power level, and selection topology of an oscillator circuit suitable for a CMOS Integrated Doppler radar application, in order to facilitate short range target detection within 5-15 m range, using a 0.35 μm CMOS process. With this selected CMOS process, the frequency band at 2.45 GHz or 5 GHz, with a maximum output power level of 25 mW (e.i.r.p), is found to be appropriate for the whole system to obtain a good performance. In this thesis work, a Ring VCO with pseudo-differential architecture has been designed and optimised for 2.45 GHz application. However, for 5 GHz application, a differential cross-coupled LC VCO oscillator topology has been suggested and it is so designed that it can be further scaled down to operate at a frequency of 2.45 GHz. The performance of the oscillator circuits has been tested at circuit level and has been presented as simulation results in this report.

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