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Implementace PCS podvrstvy 400 Gb/s Ethernetu v FPGA / Implementation of 400 Gb/s Ethernet PCS layer to FPGAKolařík, Jaroslav January 2019 (has links)
This master thesis deals with the design of the 400GBASE-R PCS in accordance with the IEEE 802.3bs-2017 standard which defines 400 Gbps Ethernet. The first part of this thesis focuses on general architecture of FPGA and its possible variants for implementation for 400 Gbps Ethernet communication, therefore there is description of those architectures and its resources. The next part describes progression of the Ethernet and its connection to the ISO/OSI reference model. The next section of this thesis is about description of physical layer of Ethernet for 400 Gbps version, after which follows design of PCS unit and its implementation with use of resources of selected FPGA. In the last part of this thesis is description of the simulation of the implemented unit. Achieved results and outcomes of this master thesis are evaluated in a conclusion.
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Návrh pulzního generátoru pro laserovou spektroskopii / Design of pulse generator for laser spectroscopyCebo, Patrik January 2020 (has links)
This diploma thesis deals with the design of a precise multi-channel pulse generator for the synchronization of laser-induced breakdown spectroscopy (LIBS) instrumentation. The thesis reflects current state-of-the-art solutions in communication and trends in the field of laser spectroscopy. Moreover, the device is based on the modern implementation of embedded devices using C and C++ programming languages using the Ethernet for communication. The communication with the control software is provided via the SDD protocol; designed at CEITEC BUT. Finally, the data of the SDD protocol are sent by the hypertext transfer protocol (HTTP) protocol in native file format (JSON). This thesis brings the synchronization of the 10 devices by precision timing.
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Systém pro vzdálené měření a ukládání dat v centrální databázi / System for remote measuring and data storing in central databaseŠváb, Jaroslav January 2009 (has links)
This Master´s thesis deals with the design and implementation of System for remote measuring and data storing in central databese. The system consists of server, which collects data and clients that send data to the server. On the server is installed program Apache in which runs utility script for collecting and evaluating data, written in PHP. Data are stored in MySQL relational database and can be clearly displayed. The client consists of microcontroller ATmega16, which evaluates data from sensors. These data are then transferred via Ethernet using the HTTP protocol through the module XPort.
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Vysokorychlostní přepínač dat / High-speed data switchToman, Jakub January 2012 (has links)
The master’s thesis is focused on desing high-speed ethernet switch based on circuit FPGA. The switch is able to divide one data stream, created from ethernet frames to the two data streams with half data flow.
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Systém pro monitorování a nastavení signálového procesoru v digitálním reproduktorovém systému / System for monitoring and setup of signal processor in digital loudspeaker systemLaník, Jakub January 2013 (has links)
This project solves teoretical design of digital reproductor system and controlling GUI software. This digital system is composed of one master unit, which digitalize different audio sources and stream them by ethernet to slave units. The controlling software is be able to set and monitor the audio system.
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Explosionsschutz in Ethernet-basierten FeldbussystemenKwidzinski, M., Mahendrarajah, A., Stephan-Büldt, L., Große, N. 14 February 2024 (has links)
Die Leitsysteme der Prozessindustrie haben sich in den letzten Jahren kaum verändert. Mit Ethernet-
APL gibt es nun eine Möglichkeit Ethernet bis ins Feld zu bekommen. Ethernet-APL liefert schnelle
Kommunikation über lange Distanzen und das auch in explosionsgefährdeten Bereichen.
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Electronic Engine Controller Simulation and Emulation with Ethernet ConnectivityBlackann, Joshua A. 09 August 2011 (has links)
No description available.
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Data-Link Layer Traceback in Ethernet NetworksSnow, Michael Thomas 07 December 2006 (has links)
The design of the most commonly-used Internet and Local Area Network protocols provide no way of verifying the sender of a packet is who it claims to be. Protocols and applications exist that provide authentication but these are generally for special use cases. A malicious host can easily launch an attack while pretending to be another host to avoid being discovered. At worst, the behavior may implicate a legitimate host causing it and the user to be kicked off the network. A malicious host may further conceal its location by sending the attack packets from one or more remotely-controlled hosts. Current research has provided techniques to support traceback, the process of determining the complete attack path from the victim back to the attack coordinator. Most of this research focuses on IP traceback, from the victim through the Internet to the edge of the network containing the attack packet source, and Stepping-Stone traceback, from source to the host controlling the attack. However, little research has been conducted on the problem of Data-Link Layer Traceback (DLT), the process of tracing frames from the network edge to the attack source, across what is usually a layer-2 network. We propose a scheme called Tagged-fRAme tracebaCK (TRACK) that provides a secure, reliable DLT technique for Ethernet networks. TRACK defines processes for Ethernet switches and a centralized storage and lookup host. As a frame enters a TRACK-enabled network, a tag is added indicating the switch and port on which the frame entered the network. This tag is collected at the network edge for later use in the traceback operation. An authentication method is defined to prevent unauthorized entities from generating or modifying tag data. Simulation results indicate that TRACK provides accurate DLT operation while causing minimal impact on network and application performance. / Master of Science
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[en] DEVELOPMENT OF A GIGABIT ETHERNET ELEMENT ANALYZER / [pt] DESENVOLVIMENTO DE UM ANALISADOR DE ELEMENTOS DE REDE BASEADO NO PADRÃO GIGABIT ETHERNETFERNANDO DINIZ HAMMERLI 17 October 2008 (has links)
[pt] O objetivo desta dissertação consiste no desenvolvimento e
na realização de um analisador de redes e elementos de
redes na taxa de 1 Gbps. A tecnologia de lógica programável
(FPGA) é utilizada através de uma placa de desenvolvimento
ativada por ferramentas computacionais dedicadas a esta
aplicação. O módulo realizado é utilizado para caracterizar
uma rede e alguns elementos de rede em função da taxa
máxima de transmissão de pacotes, número de pacotes
perdidos e retardo. Uma comparação entre os resultados
fornecidos pelo módulo desenvolvido e um equipamento
comercial é apresentada e comentada. Finalmente, as
principais vantagens da proposta desta dissertação são
destacadas. / [en] The main purpose of this dissertation is the development
and realization of a Gigabit Ethernet network element
analyzer. The FPGA technology is employed through a
development board, activated by dedicated software tools.
The prototype realized is employed to describe a network
and network elements by maximum transmission capacity,
frame loss and delay. A comparative analysis
between this prototype and a commercial equipment is
performed. Finally, the main advantages of this
dissertation will be highlighted.
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TCP/IP sobre LANE e o seu impacto prático na rede local / TCP/IP over LANE and its practical impact on a local area networkKakuda, Claudio Massaki 11 August 2006 (has links)
Esta dissertação descreve os métodos, medidas e análises feitas para otimizar a rede de comunicação de dados do Instituto de Física de São Carlos. As tecnologias e protocolos utilizados na rede são apresentados. Especial atenção é dada a análise do desempenho de VLANs utilizando inicialmente o protocolo LANE no núcleo ATM da rede. Neste caso a rede é composta de switches ATM e ATM-Ethernet. Medidas comparativas foram realizadas com a utilização da tecnologia Fast Ethernet no backbone, que possui uma capacidade de transmissão relativamente próxima da ATM de 155Mbps. Melhores resultados obtidos com a implementação de sub-redes maiores, reduzindo em um numero menor de sub-redes, são discutidos e apresentados. Análises estatísticas baseadas apenas no tempo de resposta da rede são apresentados para avaliar o desempenho das alterações efetuadas nas configurações da rede. Mesmo que o tráfego tenha aumentado muito durante esses anos e que vários serviços tenha sido agregados a esta rede, foi possível adequar o desempenho as novas necessidades beneficiando-se da evolução tecnológica que os equipamentos de rede de dados trouxeram ao IFSC. / This work describes the methods, measures and analyses performed aiming to optimize the data communication network from the Physics Institute of Sao Carlos as well as the technologies and protocols used in the network recently. Special care is given to the analysis of the VLANs performance using, initially, the LANE protocol over ATM which has its core based on pure ATM and ATM-Ethernet switches. Comparative measures had been carried out using a backbone working on a Fast Ethernet technology, which seems to have a very close transmission rate from the ATM 155Mbps. This work also discusses best results acquired with the implementation of larger networks reducing the number of subnetworks, statistical analyses based on time delay of the network in order to evaluate the performance of the changes made on its configuration. Even though the traffic from the Institute has been increased over these years and several services have been added to the network, it was completely possible to adapt the performance to the needs, using the benefits of the technological evolution which the network equipments had brought to the Institute.
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