This thesis details work undertaken over the past three and a half years looking at the optical properties of silicon-on-insulator waveguide arrays and 1D photonic crystal microcavities. Chapter 1 contains relevant background information, while chapters 2, 3 and 4 contain results of experimental work. Chapter 5 summarises the results and conclusions of the preceding chapters and also suggests some directions for possible future research. Chapter 1 starts by introducing some of the fundamental aspects of guided wave optics and how these relate to silicon-on-insulator waveguides. The modes of single,uncoupled silicon waveguides are described, along with a brief description of how such waveguides can be fabricated. Following this a short introduction to optical cavities and the relevant parameters that can be used to describe them is provided. In Chapter 2 results are presented that experimentally confirm the presence of couplinginduced dispersion in an array consisting of two strongly-coupled silicon-on-insulator waveguides. This provides an additional mechanism to tailor dispersion and shows that it is possible to achieve anomalous dispersion at wavelengths where the dispersion of a single wire would be normal. In Chapter 3 the focus switches to the linear properties of 1D photonic crystal microcavities in silicon. The optical transmission of a number of different devices are examined allowing the identification of suitable microcavities for use in nonlinear measurements. Microcavities with Q-factors in excess of ∼40,000 were selected for use in the work presented in Chapter 4, whilst the possibility of thermally tuning the microcavity resonances is also investigated. A cavity resonance shift of 0.0770± 0.0004 nm K-1 is measured experimentally. Chapter 4 looks at the nonlinear transmission of those microcavities identified as suitable in Chapter 3. More specifically, the response of the microcavities to thermal and free carrier induced bistability is considered. Thermally induced bistability is observed at a threshold power of 240 μW for the particular cavity chosen, with a thermal time of 0.6 μs also measured. Free carrier induced bistability is then observed for pulses with nanosecond durations and milliwatt peak powers. Following that, the interplay of thermal and free carrier effects is observed using input pulses of a suitable duration.

Lau Wai Kwok. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1996. / Includes bibliographical references. / Acknowledgement --- p.iv / Abstract --- p.v / Chapter Chapter 1 --- Introduction --- p.1-1 / Chapter 1.1 --- Perspective --- p.1-1 / Chapter 1.2 --- MEDICI - The Simulation Package --- p.1 -2 / Chapter 1.3 --- Overview --- p.1-3 / Chapter Chapter 2 --- The Emergence of SOI Devices --- p.2-1 / Chapter 2.1 --- Introduction --- p.2-1 / Chapter 2.2 --- Advantages of SOI Devices --- p.2-1 / Chapter 2.2.1 --- Reliability Improvement --- p.2-2 / Chapter 2.2.2 --- Total Isolation --- p.2-3 / Chapter 2.2.3 --- Improved Junction Structure --- p.2-4 / Chapter 2.2.4 --- Integrated Device Structure --- p.2-5 / Chapter 2.3 --- Categories of SOI Devices --- p.2-6 / Chapter 2.3.1 --- Thick Film SOI Devices --- p.2-7 / Chapter 2.3.2 --- Thin Film SOI Devices --- p.2-8 / Chapter 2.3.3 --- Medium Film SOI Devices --- p.2-8 / Chapter 2.4 --- Drawbacks of SOI Devices --- p.2-9 / Chapter 2.4.1 --- Floating Body Effects --- p.2-9 / Chapter 2.4.2 --- Parasitic Bipolar Effects --- p.2-11 / Chapter 2.4.3 --- Cost --- p.2-15 / Chapter 2.5 --- Manufacturing Methods --- p.2-16 / Chapter 2.5.1 --- Epitaxy-Based Method --- p.2-16 / Chapter 2.5.2 --- Recrystallization-Based Method --- p.2-18 / Chapter 2.5.3 --- Wafer Bonding Based Method --- p.2-19 / Chapter 2.5.4 --- Oxidation Based Method --- p.2-20 / Chapter 2.5.5 --- Implantation Based Method --- p.2-22 / Chapter 2.6 --- Future Trend --- p.2-22 / Chapter 2.7 --- The Quest for Silicon-On-Nitride Structure --- p.2-23 / Chapter Chapter 3 --- Description of Body-Contact SOI Structure --- p.3-1 / Chapter 3.1 --- Introduction --- p.3-1 / Chapter 3.2 --- Current Status of Body-Contact SOI Structure --- p.3-1 / Chapter 3.3 --- The Body-Contact SOI Structure to be studied --- p.3-4 / Chapter 3.4 --- Impact on Device Fabrication --- p.3-7 / Chapter 3.4.1 --- Fabrication of Conventional Bulk CMOS --- p.3-7 / Chapter 3.4.2 --- Fabrication of Conventional SOI CMOS --- p.3-8 / Chapter 3.4.3 --- Fabrication of BC SOI CMOS --- p.3-10 / Chapter Chapter 4 --- Device Simulations --- p.4-1 / Chapter 4.1 --- Introduction --- p.4-1 / Chapter 4.2 --- MEDICI --- p.4-1 / Chapter 4.2.1 --- Basic Equations --- p.4-2 / Chapter 4.2.2 --- Solution Methods --- p.4-3 / Chapter 4.2.3 --- Initial Guess --- p.4-6 / Chapter 4.2.4 --- Grid Allocations --- p.4-7 / Chapter 4.2.5 --- Source File --- p.4-8 / Chapter 4.3 --- Structures for Simulations --- p.4-9 / Chapter 4.3.1 --- l.2μm NMOS Bulk (LDD) --- p.4-9 / Chapter 4.3.2 --- 1.2μm SOI(O) NMOS 1000/3500 NBC --- p.4-11 / Chapter 4.3.3 --- 1.2μm SOI(N) NMOS 1000/3500 NBC --- p.4-12 / Chapter 4.3.4 --- 1.2μm SOI(O) NMOS 1000/3500 WBC --- p.4-13 / Chapter 4.3.5 --- 1.2μm SOI(N) NMOS 1000/3500 WBC --- p.4-14 / Chapter 4.4 --- Summary --- p.4-14 / Chapter Chapter 5 --- Simulation Results --- p.5-1 / Chapter 5.1 --- Introduction --- p.5-1 / Chapter 5.2 --- Comparisons of Different Structures --- p.5-1 / Chapter 5.2.1 --- Impurity Profiles of Structures --- p.5-2 / Chapter 5.2.2 --- Body Effect --- p.5-10 / Chapter 5.2.3 --- Breakdown Voltage and Transistor Current Driving --- p.5-16 / Chapter 5.2.4 --- Transconductance and Mobility --- p.5-20 / Chapter 5.2.5 --- Subthreshold Swing --- p.5-23 / Chapter 5.3 --- Dependence on Key Structure Parameters --- p.5-29 / Chapter 5.3.1 --- Dependence on Insulator Thickness --- p.5-29 / Chapter 5.3.2 --- Dependence on Silicon Overlayer Thickness --- p.5-34 / Chapter 5.3.3 --- Dependence on Size of Body-Contact --- p.5-37 / Chapter 5.4 --- Summary --- p.5-40 / Chapter Chapter 6 --- Reduction of Latch-up Susceptibility --- p.6-1 / Chapter 6.1 --- Introduction --- p.6-1 / Chapter 6.2 --- Construction of a p-channel MOS Transistor --- p.6-2 / Chapter 6.2.1 --- Threshold Voltage and Body Effect --- p.6-3 / Chapter 6.2.2 --- I-V Characteristics --- p.6-3 / Chapter 6.2.3 --- Transconductance --- p.6-5 / Chapter 6.2.4 --- Subthreshold Swing --- p.6-5 / Chapter 6.3 --- Mechanism of Latch-up in CMOS --- p.6-6 / Chapter 6.4 --- Construction of a CMOS Invertor for Simulation --- p.6-10 / Chapter 6.5 --- Latch-up Susceptibility Dependence --- p.6-16 / Chapter 6.5.1 --- Dependence on Insulator Thickness --- p.6-16 / Chapter 6.5.2 --- Dependence on N-well Depth --- p.6-19 / Chapter 6.5.3 --- Dependence on Transistor Separation --- p.6-22 / Chapter 6.5.4 --- Dependence on Size of Body-Contact --- p.6-25 / Chapter 6.6 --- Summary --- p.6-28 / Chapter Chapter 7 --- Conclusions --- p.7-1 / Chapter 7.1 --- Summary --- p.7-1 / Chapter 7.2 --- Recommendation --- p.7-3 / Reference / Appendix A

Measurements of the electron-induced electron emission properties of insulators are important to many applications including spacecraft charging, scanning electron microscopy, electron sources, and particle detection technology. However, these measurements are difficult to make since insulators can charge either negatively or positively under charge particle bombardment that in turn alters insulator emissions. In addition, incident electron bombardment can modify the conductivity, internal charge distribution, surface potential, and material structure in ways that are not well understood. A primary goal of this dissertation work has been to make consistent and accurate measurements of the uncharged electron yields for insulator materials using innovative instrumentation and techniques. Furthermore, this dissertation reports on the experimental work undertaken by our group to explore insulator charging rates as a function of incident electron energy and fluence. Specifically, these charging studies include: (i) the study of the effectiveness of charge-neutralization techniques such as low-energy electron flooding and UV light irradiation to dissipate both positive and negative surface potentials induced by incident electron irradiation, (ii) the exploration of several noncontacting methods used to determine insulator surface potentials and the insulator first and second crossover energies that are important in determining both the polarity and magnitude of spacecraft material potentials, (iii) the dynamical evolution of electron emissions and sample displacement current as a function of incident charge fluence and energy with ties to evolving surface potentials as an insulator reaches its current steady state condition, and (iv) the slow evolution of electron yields with continuous incident electron bombardment. These charging data are explained in the context of available insulator charging models. Specific insulator materials tested included chromic acid anodized aluminum, RTVsilicone solar array adhesives, and KaptonTM on aluminum.

Thesis (Ph.D.)--McMaster University, 2006. / Supervisor: P.E. Jessop Includes bibliographical references ( leaves 166-179).

A method of synthesizing and controlling the size of germanium nanocrystals is developed. A tri-layer metal-insulator-semiconductor (MIS) memory device structure comprising of a thin (~5nm) silicon dioxide (SiO₂) layer grown using rapid thermal oxidation (RTO), followed by a layer of Ge+SiO₂ of varying thickness (3 - 6 nm) deposited using a radio frequency (rf) co-sputtering technique, and a capping SiO₂ layer (50nm) deposited using rf sputtering is investigated. It was verified that the size of germanium (Ge) nanocrystals in the vertical z-direction in the trilayer memory device was controlled by varying the thickness of the middle (cosputtered Ge+SiO₂) layer. From analyses using transmission electron microscopy and capacitance-voltage measurements, we deduced that both electrons and holes are most likely stored within the nanocrystals in the middle layer of the trilayer structure rather than at the interfaces of the nanocrystals with the oxide matrix. / Singapore-MIT Alliance (SMA)

The effect of germanium (Ge) concentration and the rapid thermal oxide (RTO) layer thickness on the nanocrystal formation and charge storage/retention capability of a trilayer metal-insulator-semiconductor device was studied. We found that the RTO and the capping oxide layers were not totally effective in confining the Ge nanocrystals in the middle layer when a pure Ge middle layer was used for the formation of nanocrystals. From the transmission electron microscopy and secondary ion mass spectroscopy results, a significant diffusion of Ge atoms through the RTO and into the silicon (Si) substrate was observed when the RTO layer thickness was reduced to 2.5 nm. This resulted in no (or very few) nanocrystals formed in the system. For devices with a Ge+SiO₂ co-sputtered middle layer (i.e., lower Ge concentration), a higher charge storage capability was obtained than with devices with a thinner RTO layer, and the charge retention time was found to be less than in devices with a thicker RTO layer. / Singapore-MIT Alliance (SMA)

Thesis (Ph.D.)--Hong Kong University of Science and Technology, 2006. / Includes bibliographical references. Also available in electronic version.

三維拓樸絕緣體，其擁有表面可以導電但內部卻屬於絕緣體的特殊性質；近年來成為熱門的研究領域。拓樸保護表面態此種獨特性質使得拓樸絕緣體有潛力成為自旋電子學研究材料。在已發表的文獻中可以得知Bi2Te3系列材料已經被證實為拓樸絕緣體。我們製作了一系列的Bi1.5Sb0.5Te3-ySey材料，希望藉由硒元素的摻雜改變在狄拉克錐體附近的能帶結構以更詳加了解拓樸絕緣體表面性質以及其物理特性。他們的晶格結構為菱形六角面體；當摻雜量y=1.6時，a軸及c軸的晶格常數分別為4.25 Å以及29.80 Å；同時也發現晶格常數隨著硒元素的摻雜量提高而逐漸遞減。為了更進一步了解拓樸絕緣體物理性質，我們做了電阻率、磁阻以及霍爾效應的量測以及分析。電阻率的結果顯示，樣品在高溫時呈現絕緣體的電阻性質，但在低溫時表面態傳導電子開始主導而電阻上升趨勢轉趨於平緩。在霍爾效應中看到低溫至高溫由p-type轉n-type，並且其變化溫度和硒元素摻雜有直接關聯。高溫的n-type載子歸咎於於能隙間的Donor Level受熱後激發電子至傳導帶，最後取代原有的電洞使材料變成n-type。透過阿瑞尼士方程式，可由電阻對溫度曲線計算其活化能，同時可以了解低溫下電阻反曲及載子型態改變之間的關係。我們在磁阻量測中觀察到了弱反局域效應，並且從2 K的數據中顯示此現象和硒元素的摻雜沒有直接關聯性。 / 3D Topological insulator (TI), a type of material that insulates inside bulk and conducts on the surfaces, becomes a popular topic in recent years. The unique topologically protected surface states turn topological insulator to be a potential spintronic material. Bi2Te3 based materials have been studied and identified as topological insulators. In order to study the properties of the surface states, a series of specimens of Bi1.5Sb0.5Te3-ySey (BSTS) with y=1.1, 1.2, 1.4, and 1.6 were fabricated for tuning the band gap around Dirac cone. The lattice structure of Bi1.5Sb0.5Te3-ySey is confirmed to be rhombohedral. For the specimen y=1.4 the lattice constants a ̂ and c ̂are 4.25Å and 29.80Å respectively. The lattice constants decrease with Se substitution increase. To characterize the TI properties, the resistivity, magnetoresistance and Hall effect were studied. Resistivity showed an insulator behavior at high temperatures and surface conduction behavior at low temperatures. The dominate carriers are p-type at low temperatures and become n-type at high temperatures. According to the correlations of resistivity and Hall effect of Bi1.5Sb0.5Te3-ySey, we observed that thermal activation can be tuned by Selenium dopants. The weak anti-localization was also observed in our bulk samples. From the 2 K magnetoresistance, we observed that weak anti-localization was independent on Selenium and Tellurium concentrations in all specimens.

For the high performance integrated circuits applications such as microprocessors, memories and high power devices, the metal-oxide-semiconductor field effect transistors (MOSFETs) is the most important device due to its low cost, power consumption and scalable property especially. However, the aggressive scaling of conventional MOS devices suffered from noticeable short channel effects such as drain induction barrier lower, punch through, and direct tunneling gate leakage. Those problems not only lower the gate control ability but also increase the standby power consumption. For future VLSI devises below 65 nm regimes, silicon-on-insulator (SOI) and high-k/metal gate MOSFETs are considered to be possible candidates because of faster operation speed and lower power consumption. Therefore, this dissertation investigates the electrical characteristics and reliability issues of novel MOSFETs for 65 nm and below technology. It is roughly divided into two parts, partially depleted (PD) SOI MOSFETs and high-k/metal gate stack MOSFETs, respectively. In the first part, we systematically investigate the mechanism of gate-induced floating body effect (GIFBE) for advanced PD SOI n-MOSFETs. Based on different operation conditions, it was found that the dominant mechanism can be attributed to the anode hole injection (AHI) rather than the widely accepted mechanism of electron-valence band (EVB) tunneling. Analyzing the GIFBE in different temperature provides further evidence that the accumulation of holes in the body results from the AHI induced direct tunneling current from the poly-Si gate. In addition, we proposed an approach by bending silicon substrate to further study the impact of mechanical strain on GIFBE. The experimental result indicates that the strain effect indeed decreases the gate leakage current, but increases the hole-valence band (HVB) tunneling current, which indicates that GIFBE becomes serious under mechanical strain. Based on our proposed AHI model, this phenomenon can be mainly due to strain-induced band gap narrowing in the poly-Si gate. In p-type MOSFETs, the reliability issue, named negative bias temperature instability (NBTI), is the dominant degradation mechanism during ON-state operation. Therefore, we also investigate the GIFBE on NBTI degradation for PD SOI p-MOSFETs. The experimental results indicate GIFBE causes a reduction in the electrical oxide field, leading to an underestimate of NBTI degradation. This can be partially attributed to the electrons tunneling from the process-induced partial n+ poly gate. However, based on different operation conditions, we found the dominant origin of electrons was strongly dependent on holes in the inversion layer under source/drain grounding. Therefore, we propose the anode electron injection (AEI) model, similar to anode hole injection model, to explain how this main electron origin is generated during the NBTI stress. Finally, based on our proposed model, we further study influence of mechanical strain on GIFBE for SOI p-MOSFETs. On the other hand, the SiO2 dielectric and poly-gate are unsuitable for CMOS application below 45 nm technology node due to unacceptable gate leakage current. Therefore, in the second part of this thesis, we investigate the electrical characteristics and physical mechanisms for MOSFETs with HfO2/TixN1-x stacks by using split C-V, DC Id-Vg, and charge pumping techniques. The experimental results indicates that different ratio of Ti strongly affect various parameters, including threshold voltage, mobility, and subthreshold swing, respectively. In addition, the gate leakage current is also strongly dependent on the nitrogen in metal gate. By charge pumping technique, it was found that with increasing Ti concentration of metal gate, there is a trade-off relationship among the interface traps and bulk defects of high-k dielectric. This phenomenon is associated with the amount of nitride diffusion from the metal gate to high-k bulk and SiO2/Si interface layer. In the aspects of reliability, charge trapping in high-k gate stacks remains an important issue since it causes the threshold voltage (Vth) shift and drive current degradation. This phenomenon can be attributed to a large number of pre-existing traps in the high-k dielectric layer. In real circuit operation, the devices are generally operated in the dynamic condition. Therefore, the following study further investigates Vth instability of Hf-based n-MOSFETs under the dynamic bias operation. The static condition was also performed on the identical device for a comparison. The results indicate threshold voltage (Vth) instability under dynamic stress is more serious than that under static stress, owning to transient charge trapping within high-k dielectric. In addition, the Vth shift clearly increases with an increase in dynamic stress operation frequency. According to these experimental results, we propose a possible physical model for electron trapping phenomena under dynamic stress. Based on our proposed model, we further dynamic stress induced charge trapping characteristics for devices with different Ti1-xNx composition of metal-gate electrodes. In addition, we further respectively investigates the temperature dependence of dynamic positive bias stress (PBS) and negative bias stress (NBS) degradation in n-type and p-type MOSFETs with high-k/metal gate stacks. The experimental results indicate there is a contrary trend in temperature dependence of Vth shifts for n- and p-MOSFETs under dynamic PBS and NBS, respectively. The Vth shift decreases with increasing temperature for n-MOSFETs under dynamic PBS. This is due to the thermal emission of trapped electrons in high temperature, leading to the reduction in. A contrary trend with temperature for p-MOSFETs under dynamic NBS can be attributed to the interface trap generation induced by NBTI. On the other hand, hot carrier effect in high-k/metal gate n-MOSFETs was still one of major device reliability concern in device scaling. However, the stress-induced drain leakage current degradation in device with high-k/metal gate stacks has not received as much attention. In fact, the GIDL behavior is associated with phenomenon of charge trapping in high-k dielectric layer. Therefore, the final study is to investigate the effects of channel hot carrier stress (CHCS) on the gate-induced drain leakage current (GIDL) for n-MOSFETs with HfO2/Ti1-xNx gate stacks. It was found that the behavior of GIDL current during CHCS has dependence with the interfacial layer (IL) oxide thickness of high-k/metal gate stacks. As IL thickness becomes thinner, the GIDL current has a gradual decrease during CHCS, which is contrary to the result of thick-oxide IL devices. Based on the variation of GIDL current in different stress voltage across gate and drain terminals, trap-assisted band to band holes injection model was proposed to explain the different behavior of GIDL current for different IL thickness. Furthermore, we also investigated the impact of different Ti1-xNx composition of metal gate electrode on the IGIDL after CHCS, and observed that the magnitude of IGIDL decreases with the increase of nitride ratio. This is due to the fact that nitride atoms diffusing from the metal gate fill up oxygen vacancies, and reduce the concentration of traps in high-k dielectric.

Low level and variable transgene expression plague efforts to produce and characterize transgenic lines in many species. When transformation efficiency is high, productive transgenic lines can be generated with reasonable effort. However, most efforts to date in mosquitoes have resulted in suboptimal levels of transformation. This, coupled with the large space and intensive labor requirements of mosquito colony maintenance makes the optimization of transformation in mosquitoes a research priority. This study proposes two strategies for improving transgene expression and transformation efficiency. The first is to explore exogenous promoter/enhancer combinations to direct expression of either the transgene itself, or the transposase required for insertion of the transgene into the genome. An extension of this strategy is to investigate the use of a powerful viral transactivating protein and its cognate enhancer to further increase expression of these targets. The second strategy involves the identification of an endogenous boundary element for use in insulating transgenes and their associated regulatory elements. This would mitigate the inappropriate expression or silencing of many transgenes inserted into “unfavorable” genomic environments as a consequence of an inability to specifically target the integration of transposons currently used in mosquito transgenesis. The IE1 transactivating protein and its cognate enhancer from a baculovirus were shown to significantly increase expression of a reporter gene from three different promoters in cultured mosquito cells. Other heterologous enhancer/promoter combinations resulted in minimal increases or insignificant changes in expression. Orthologues of the vertebrate insulator-binding factor, CTCF, were cloned and characterized in two mosquito species, Aedes aegypti and Anopheles gambiae. The expression profile of mosquito CTCF is consistent with its role as a putative insulatorbinding protein. Preliminary binding site studies reveal a C/G-rich binding site consistent with that known in vertebrates and indicate that CTCF may bind widespread sites within mosquito genomes.