A systematic approach has been used to optimise the fabrication process of pentacene-based nonvolatile organic thin film memory transistors (OTFMTs) operating at low programming voltages. In the first part of this work, reliable, reproducible and hysteresis free organic metal-insulator-semiconductor (OMIS) devices and organic thin film transistors (OTFTs) were fabricated and characterised. All devices were based on poly(methyl methacrylate) (PMMA) and poly(vinyl phenol) (PVP) as the organic insulators. The second part of this work focused on optimising the evaporation parameters to fabricate high-performance pentacene-based devices. About 50 nm thickness of pentacene film with a deposition rate of 0.03 nm s-1 on ~ 300 nm of PMMA was found to produce large, uniform and condense grains leading to high quality devices. OTFTs with high mobility of 1.32 cm2 V−1 s−1, on/off current ratio of 106, and negligible hysteresis and leakage current were demonstrated. The effect of the environment on the OTFTs obehaviour was also investigated. The bias stress effect was also investigated in terms of threshold voltage shift ΔVT at various conditions and times. The results show ΔVT increases with the increase of stress voltage. A negligible hysteresis is evident between the forward and reverse direction of the transfer characteristics and the shape of the transfer characteristics does not change with the bias stress. Floating gate memory structures with thin layer of gold, gold nanoparticles (AuNPs) and single walled carbon nanotubes (SWCNTs) were fabricated and characterised during this investigation. Hysteresis in memory structures was a clear indication of the memory effect and charge storage in these devices. Also, the hysteresis was centred close to 0 V for SWCNTs-based structures, which indicate that a low operation voltage is needed to charge the devices. A memory window of about 40 V was observed for AuNPs-based memory devices based on PVP; while the memory windows for devices based on PMMA with thin layer of Au and AuNPs floating gates were 22 V and 32 V, respectively. The electrical properties of the OTFMTs were improved by the use of the Au nanoparticles as the floating gate compared with that of an Au thin film. Using appropriate negative or positive voltages, the floating gate was charged and discharged, resulting in a clear shift in the threshold voltage of the memory transistors. Negative and positive pulses of 1 V resulted in clear write and erase states, respectively. Additionally, these organic memory transistors exhibited rather high carrier mobility of about μ = 0.319 cm2 V-1 s-1. Furthermore the data retention and endurance measurements confirmed the non-volatile memory properties of the memory devices fabricated in this study.

Phase change devices in both optical and electrical formats have been subject of intense research since their discovery by Ovshinsky in the early 1960’s. They have revolutionized the technology of optical data storage and have very recently been adopted for non-volatile semiconductor memories. Their great success relies on their remarkable properties enabling high-speed, low power consumption and stable retention. Nevertheless, their full potential is still yet to be realized. Operations in electrical phase change devices rely on the large resistivity contrast between the crystalline (low resistance) and amorphous (high resistance) structures. The underlying mechanisms of phase transformations and the relation between structural and electrical properties in phase change materials are quite complex and need to be understood more deeply. For this purpose, we compare different approaches to mathematical modelling that have been suggested to realistically simulate the crystallization and amorphization of phase change materials. In this thesis the recently introduced Gillespie Cellular Automata (GCA) approach is used to obtain direct simulation of the structural phases and the electrical states of phase change materials and devices. The GCA approach is a powerful technique to understand the nanostructure evolution during the crystallization (SET) and amorphization (RESET) processes in phase change devices over very wide length scales. Using this approach, a detailed study of the electrical properties and nanostructure dynamics during SET and RESET processes in a PCRAM cell is presented. Besides the possibility of binary storage in phase change memory devices, there is a wider and far-reaching potential for using them as the basis for new forms of arithmetic and cognitive computing. The origin of such potential lies in a previously under-explored property, namely accumulation which has the potential to implement basic arithmetic computations. We exploit and explore this accumulative property in films and devices. Furthermore, we also show that the same accumulation property can be used to mimic a simple integrate and fire neuron. Thus by combining both a phase change cell operating in the accumulative regime for the neural body and a phase change cell in the multilevel regime for the synaptic weighting an artificial neuromorphic system can be obtained. This may open a new route for the realization of phase change based cognitive computers. This thesis also examines the relaxation oscillations observed under suitable bias conditions in phase change devices. The results presented are performed through a circuit analysis in addition with a generation and recombination mechanism driven by the electric field and carrier densities. To correctly model the oscillations we show that it is necessary to include a parasitic inductance. Related to the electrical states of phase change materials and devices is the threshold switching of the amorphous phase at high electric fields and recent work has suggested that such threshold switching is the result of field-induced nucleation. An electric field induced nucleation mechanism is incorporated into the GCA approach by adding electric field dependence to the free energy of the system. Using results for a continuous phase change thin films and PCRAM devices we show that a purely electronic explanation of threshold switching, rather than field-induced nucleation, provides threshold fields closer to experimentally measured values.

Η συμπεριφορά των NAND Flash μνημών, της πιο επιτυχημένης τε- χνολογίας Non-Volatile μνημών σήμερα, αλλοιώνεται με την αύξηση των εγγραφών. Αυτή η διαδικασία, που ονομάζεται γήρανση, πέρα από μη ανα- στρέψιμη είναι και πολύ σημαντική για τον σχεδιασμό συστημάτων που χρησιμοποιούν NAND Flash μνήμες (π.χ. SSD), επειδή επηρεάζει την ΙΟ απόδοση και την αξιοπιστία του συστήματος. Τα πειράματα πάνω σε πραγ- ματικές NAND Flash μνήμες είναι χρονοβόρες και μη αναστρέψιμες δια- δικασίες, καθώς νέες εγγραφές στην μνήμη αυξάνουν την γήρανση και η συμπεριφορά του συστήματος αλλάζει. Σκοπός της παρούσας διπλωματικής εργασίας, είναι η ανάπτυξη ενός συστήματος που θα μπορεί να εξομοιώσει σε πραγματικό χρόνο και με με- γάλη ακρίβεια την συμπεριφορά NAND Flash μνημών με συνθήκες γή- ρανσης παραμετροποιημένες από τον χρήστη. Τα βασικά πλεονεκτήματα αυτής της προσέγγισης είναι τα ακόλουθα: η τεχνολογία που εξομοιώνεται μπορεί να χρησιμοποιηθεί υπό ίδιες συνθήκες γήρανσης για επαναληπτικά πειράματα και το ίδιο σύστημα μπορεί να χρησιμοποιηθεί για να συγκρίνει διαφορετικές τεχνολογίες μνημών υπό διαφορετικές συνθήκες γήρανσης χρησιμοποιώντας τις ίδιες ρυθμίσεις hardware. / The behavior of NAND Flash, the most successful non-volatile memory technology today, deteriorates as the number of write accesses increases. This process, known as aging, is not only irreversible but also critical for the design of systemsthat use NAND Flash (ie. Solid-State Drives), since it affects the system’s IO performance and the required overhead for achieving a specific level of reliability. Experimental characterization of NAND Flash-based systems during their whole lifetime is a time-consuming and non-repetitive process, since further programming cycles increase aging, and the system's behavior changes. In this work, we present the architecture and experimental resultsof a system that can be used to emulate in real-time and with high precision the behavior of NAND Flash memories underuser-defined aging conditions. The main advantages of this approach are the following: the emulated technology can be used under the same aging conditions for repetitive experiments and under different aging conditions using the same hardware setup.

Nous assistons aujourd’hui à une croissance vertigineuse des volumes de données. Cela exerce une pression sur les infrastructures de stockage et les logiciels de traitement de données comme les Systèmes de Gestion de Base de Données (SGBD). De nouvelles technologies ont vu le jour et permettent de réduire la pression exercée par les grandes masses de données. Nous nous intéressons particulièrement aux nouvelles technologies de mémoires secondaires comme les supports de stockage SSD (Solid State Drive) à base de mémoire Flash. Les supports de stockage SSD offrent des performances jusqu’à 10 fois plus élevées que les supports de stockage magnétiques. Cependant, ces nouveaux supports de stockage offrent un nouveau modèle de performance. Cela implique l’optimisation des coûts d’E/S pour les algorithmes de traitement et de gestion des données. Dans cette thèse, nous proposons un modèle des coûts d’E/S sur SSD pour les algorithmes de traitement de données. Ce modèle considère principalement le volume des données, l’espace mémoire alloué et la distribution des données. Nous proposons également un nouvel algorithme de tri en mémoire secondaire : MONTRES. Ce dernier est optimisé pour réduire le coût des E/S lorsque le volume de données à trier fait plusieurs fois la taille de la mémoire principale. Nous proposons enfin un mécanisme de pré-chargement de données : Lynx. Ce dernier utilise un mécanisme d’apprentissage pour prédire et anticiper les prochaines lectures en mémoire secondaire. / The growing volume of data poses a real challenge to data processing software like DBMS (DataBase Management Systems) and data storage infrastructure. New technologies have emerged in order to face the data volume challenges. We considered in this thesis the emerging new external memories like flash memory-based storage devices named SSD (Solid State Drive).SSD storage devices offer a performance gain compared to the traditional magnetic devices.However, SSD devices offer a new performance model that involves 10 cost optimization for data processing and management algorithms.We proposed in this thesis an 10 cost model to evaluate the data processing algorithms. This model considers mainly the SSD 10 performance and the data distribution.We also proposed a new external sorting algorithm: MONTRES. This algorithm includes optimizations to reduce the 10 cost when the volume of data is greater than the allocated memory space by an order of magnitude. We proposed finally a data prefetching mechanism: Lynx. This one makes use of a machine learning technique to predict and to anticipate future access to the external memory.