Dans cette thèse, nous étudions la formation de domaines ferroélectriques dans des nanostructures, à partir d'une modélisation faisant intervenir les équations de Ginzburg-Landau et d’Électrostatique, ainsi que des conditions aux limites d'application potentielle. Dans la première partie de la thèse, les nanostructures sont constituées d'une couche ferroélectrique entièrement enclavée dans un environnement paraélectrique. Nous introduisons un modèle depuis un couplage de ces équations et élaborons, pour son investigation, un schéma numérique faisant usage d’Éléments Finis. Des simulations numériques montrent l'efficacité de ce schéma, qui permet d'établir, par exemple, l'existence de cycles d'hystérésis sous l'influence de paramètres aussi bien physiques que géométriques. Dans la seconde partie, les nanostructures sont constituées d'une couche ferroélectrique partiellement enclavée qui s'intercale entre deux couches paraélectriques. Deux modèles sont proposés à partir d'une variante du couplage réalisé dans la première partie, et se distinguent dans la prescription des conditions aux limites. Des conditions de type Neumann interviennent dans le premier modèle, pour lequel un schéma numérique aussi basé sur des approximations par Eléments Finis est introduit. Dans le second modèle, des conditions périodiques sont prises en considération ; un schéma numérique s'appuyant ici sur une hybridation des méthodes de Différences Finies et d'Eléments Finis est présenté. Les simulations numériques basées sur ces deux schémas permettent de renseigner sur les permittivités dites effectives, des nanostructures, ou encore sur la constitution des parois de domaines ferroélectriques / In this thesis, we study the formation of ferroelectric domains in nanostructures by modeling based on the Ginzburg-Landau and Electrostatics equations, together with boundary conditions that are suitable for real applications. In the first part of the thesis, the nanostructures are made up of a ferroelectric layer, fully enclosed in a paraelectric environment. We introduce a model based on the coupled system of equations and then develop, for its investigation, a numerical scheme using Finite Elements. Numerical simulations show the efficiency of this scheme, which allows us to establish, for instance, the existence of hysteresis cycles under the influence of physical or geometric parameters. In the second part, the nanostructures are made up of a partially enclosed ferroelectric layer that lies between two paraelectric layers. Two models are introduced from a variant of the coupling performed in the first part, and differ in the prescription of the boundary conditions. Neumann type conditions are prescribed in the first model, for which a numerical scheme also based on Finite Element approximations is developed. In the second model, periodic conditions are taken into account; a numerical scheme based on a combination of Finite Difference and Finite Element methods is presented. Numerical simulations from these schemes allow us, for instance, to investigate the so-called effective permittivities, of the nanostructures, or the formation of ferroelectric domain walls

Silicon based 3D fin structure is believed to be the potential future of current semiconductor technology. However, there are significant challenges still exist in realizing a manufacturable fin based process. In this work, we have studied the effects of hydrogen anneal on the structural and electrical characteristics of silicon fin based devices: tri-gate, finFET to name a few. H₂ anneal is shown to play a major role in structural integrity and manufacturability of 3D fin structure which is the most critical feature for these types of devices. Both the temperature and the pressure of H₂ anneal can result in significant alteration of fin height and shape as well as electrical characteristics. Optimum H₂ anneal is required in order to improve carrier mobility and device reliability as shown in this work. A new hard-mask based process was developed to retain H₂ anneal related benefit while eliminating detrimental effects such as reduction of device drive current due to fin height reduction. We have also demonstrated a novel 1T-1C pseudo Static Random Access Memory (1T-1C pseudo SRAM) memory cell using low cost conventional tri-gate process by utilizing selective H₂ anneal and other clever process techniques. TCAD-based simulation was also provided to show its competitive advantage over other types of static and dynamic memories in 45nm and beyond technologies. A high gain bipolar based on silicon fin process flow was proposed for the first time that can be used in BiCMOS technology suitable for low cost mixed signal and RF products. TCAD-based simulation results proved the concept with gain as high 100 for a NPN device using single additional mask. Overall, this work has shown that several novel process techniques and selective use of optimum H₂ anneal can lead to various high performance and low cost devices and memory cells those are much better than the devices using current conventional 3D fin based process techniques. / text