This thesis focuses on the design and analysis of a novel variable inductor (VID) based VCO solution to the frequency tuning range (TR) limitation of the IEEE 802.11ad compliant radio systems. The IEEE 802.11ad standard has drawn strong attention from the industry as the next generation affordable multi-gigabit speed wireless communication standard. Prepared for the global market, IEEE 802.11ad compliant systems are required to cover a broad 8 GHz TR centered on 60 GHz. This wide TR at V band imposes significant challenge to the VCO design in radio transceivers, and makes the TR of the integrated VCO a major bottleneck to the successful commercialization of many IEEE 802.11ad compliant radio systems today. As an effort to solve the current TR problem for the IEEE 802.11ad compliant radio systems, 2 VCOs designs based on this novel VID-based solution and a conventional Colpitts-Clapp VCO design are presented in this thesis report. The novel VCOs integrate a VID into the differential Colpitts configuration to create a feasible solution to the aforementioned TR problem. The VID in the VCO tank eliminates the base node varactors and their fixed parasitic capacitance that degrades TR in conventional VCO designs, while the differential Colpitts configuration provides advantageous performance at mm-wave frequencies and high output power for real-world applications. Also, a fundamental 30 GHz Colpitts-Clapp VCO was developed in conjunction with the other 2 VCOs for comparison purposes. One of the 2 VID-based VCO designs is a fundamental 30 GHz VID-based Colpitts VCO that covers 17% TR for proof of concept to the novel topology. Another is an IEEE 802.11ad compliant 60 GHz VCO chain consists of the 30 GHz VID-based Colpitts VCO and a frequency doubler covering 17% TR with 3 dBm output power and -115.7 dBc/Hz phase noise at 10 MHz offset. The conventional Colpitts-Clapp VCO is used to compare with the other 2 VID-based VCOs. As the measurement results indicate, this VID-based VCO topology provides a viable solution to overcome the TR bottleneck in the current IEEE 802.11ad compliant VCO development. All 3 VCOs are fabricated using a 130 nm SiGe BiCMOS process. / Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2014-01-23 13:40:31.258

The discovery of a charged Higgs boson (H±) would be a clear indication for physics beyond the Standard Model. This thesis describes searches for charged Higgs bosons with the ATLAS experiment at CERN’s Large Hadron Collider (LHC). The first data collected during the LHC Run 1 is analysed, searching for a light charged Higgs boson (mH±<mtop), which decays predominantly into a tau-lepton and a neutrino. Different final states with one or two leptons (electrons or muons), as well as leptonically or hadronically decaying taus, are studied, and exclusion limits are set. The background arising from misidentified non-prompt electrons and muons was estimated from data. This so-called "Matrix Method'' exploits the difference in the lepton identification between real, prompt, and misidentified or non-prompt electrons and muons. The Matrix Method is used in all charged Higgs boson searches in this thesis. In 2024 the LHC will be upgraded into a High Luminosity LHC (HL-LHC). The ATLAS detector is expected to collect around 300 fb-1 of collision data until 2022, whereas the HL-LHC will deliver about 250-300 fb-1 of data per year. This will increase the mean number of interactions per bunch crossing, resulting in larger particle fluxes. This puts challenging requirements on the electronics. In order to keep trigger and data rates at manageable levels, new trigger concepts require more intelligence at early stage which possibly results in more cables and connectors, inside the detector which lead to degraded performance of the detector system. This thesis presents new concepts using wireless technology at 60 GHz, in order add more data links inside the detector system without adding much material. Patch antennas have been developed, operating at 60 GHz. Manufacture methods have been investigated, and the fabrication tolerances and bandwidth of these antennas have been studied. Also, concepts of using passive repeaters have been investigated, to make the 60 GHz signal pass boundaries. These repeaters can be used to connect intelligence inside the detector, but also for reading out data from the whole detector radially.

Modern embedded systems complexity, performance and energy efficiency has been increasing steeply the last few years. An explosive growth in demand for wireless communication is observed as well and modern wireless links are expected to deliver bit rates of several gigabits while consuming even less energy. In order to satisfy these needs new technologies emerge and novel design approaches are put into practice. Communication at 60 GHz is such a technology that is able to deliver high bit rates in short range wireless links. A major motivation to use the 60 GHz spectrum is the worldwide availability which makes exploitation economically viable. Moreover, small wavelength of only 5 mm promises high integration due to small antenna component size which is one of the main bottlenecks for reducing the dimensions. However, increased frequency comes with many disadvantages as well. To increase the market potential of such a new technology the chip design needs to be cheap and energy-efficient. Such cost and energy constrains heavily impact the performance and the quality of both the analog and the digital components of the chip. In the current thesis the design possibilities of a component in the digital baseband of the receiver of such a chip are explored. The component under investigation is a Fast Fourier Transform (FFT) that is used for frequency domain equalization. This part of the receiver is used to reduce the effects of multipath in a non line-ofsight communication environment and as this is a common case in wireless communication the FFT block has been identified as one of the 2 most computational intensive components of the receiver in 60 GHz. This is the main reason why we explore possibilities to further decrease the power consumption of the block while maintaining the performance and the quality of service. To achieve this reduction the possibilities of a new design concept are explored. System Scenarios is a new design concept for embedded systems operating in dynamic environments. Wireless communication systems exhibit high dynamism during their operation on highly varying data streams, providing the System Scenarios huge xvi capabilities. The essential idea behind system scenarios is the classification of the application under investigation from a cost perspective during design time. Then, the classification is exploited during run time resulting to an overall improved implementation of the application. To achieve this the application is broken down to run-time situations (RTS) which are distinguishable operation modes of the application. Then RTSs with similar costs are clustered to form system scenarios. Finally for each scenario a different mapping and scheduling of the application is generated. In the case of the current thesis the application is the FFT and the cost perspective is the power consumption of the component. To exploit the RTS clustering in run time different quantization schemes have been produced. These schemes have been generated based on various properties of the data waveforms in the input of the FFT. The thesis explores the potential of the System Scenarios as well as the application of a quantization methodology for the FFT. Different options of the RTS clustering and the quantization of the FFT block are evaluated in order to come up with a more efficient implementation. / Τα σύγχρονα ηλεκτρονικά συστήματα παρέχουν στους χρήστες έναν καθημερινά αυξανόμενο αριθμό υπηρεσιών και λειτουργιών. Η ζήτηση τς αγοράς για ϕθηνές, αξιόπιστες και ϕορητές ηλεκτρονικές συ- σκευές ωθεί τα όρια του σχεδιασμού των ενσωματωμένων συστημάτων σε νέες ανεξερεύνητες περιοχές. Η ϕορητότητα απαιτεί την αϕαίρεση όλων των καλωδίων είτε για μετάδοση δεδομένων είτε για ενέργεια. Για να επιτευχθεί αυτό, η ασύρματη επικοινωνία σε υψηλό ρυθμό μετάδοσης είναι επιθυμητή χωρίς να θυσιαστεί η υψηλή ενεργειακή απο- δοτικότητα που καθιστά την συσκευή αυτόνομη από το ενεργειακό δίκτυο για μεγάλες χρονικές περιόδους. Η συνεχής αύξηση στις προδιαγραϕές των σύγχρονων ενσωματομένων συστημάτων έχει οδηγήσει στην χρήση καινοτόμων ιδεών, προσεγγίσεων και τεχνολογιών. Μια νέα τεχνολογία που υπόσχεται υψηλή ολοκλήρωση και υψηλό ρυθμό μετάδοσης δεδομένων στις ασύρματες ζεύξεις είναι η επικοινωνία στα 60 GHz. Μια νέα προσέγγιση σχεδιασμού για ενσωματομένα συστήματα υπόσχεται αποτελεσματική εκμετάλευση του δυναμισμού που μπορεί να παρουσιάζει ένα σύστημα. Τα ασύρματα συστήματα επικοινωνίας λειτουργούν τυπικά σε πολύ δυναμικά περιβάλλοντα. Τα Σενάρια συστήματος έχουν μεγάλες δυνατότητες για να βελτιώσουν την αποτελεσματικότητα της υλοποίησης των ψηϕιακών βάσεων τέτοιων συστημάτων. Στην παρούσα διπλωματική εξερευνούμε της δυνατότητες της αρχιτεκτονικής του FFT που βρίσκεται στην πλευρά του δέκτη ενός πομποδέκτη στα 60 GHz. Ο FFT είναι μέρος της εξίσωσης στο πεδίο της συχνότητας που χρησιμοποιείται για να μειώσει της επιδράσεις του ϕαινομένου multipath. Χρησιμοποιώντας Σενάρια Συστήματος προσπαθούμε να καταλήξουμε με μια πιο προσαρμοστική και συνεπώς πιο ενεργειακά αποδοτική υλοποίηση του μετασχηματισμού. Η εϕαρμογή των Σεναρίων Συστήματος χρησιμοποιώντας δεδομένα ως παράμετρο είναι μια καινοτόμα προσέγγιση και σε αυτή την διπλωματική εργασία ελέγχουμε την επιτευξιμότητα της. Για να επιτύχουμε κάτι τέτοιο πρέπει να μπορούμε να παράγουμε πολλαπλά διαϕορετικά σχέδια κβαντοποίησης του μετασχηματισμού σε αποδεκτά χρονικά διαστήματα. Οι παρούσες μέθοδοι κβαντοποίησης δεν μπορούν ακόμα να παρέχουν τέτοια δυνατότητα. Έτσι βασιζόμενοι στην επέκταση μια υπάρχουσας μεθοδολογίας προτείνουμε μια ολοκληρωμένη μεθοδολογία που μπορεί να παράγει σχέδια κβαντοποίησης μεγάλων στοιχείων υλικού όπως ο FFT.

Στο πεδίο των ασύρματων επικοινωνιών της τάξης των 60 GHz που αντιστοιχούν σε ρυθμούς μετάδοσης multi-gigabits ανά δευτερόλεπτο, οι σύγχρονες υλοποιήσεις βασίζονται στα ιδιαίτερα προσαρμοζόμενα ASICs, ανάλογα με τις ανάγκες της εφαρμογής. Απαιτούνται γενικώς υψηλές ταχύτητες επεξεργασίας σε συνδυασμό με χαμηλή κατανάλωση ενέργειας. Ωστόσο, για να υποστηριχθούν διαφορετικά πρότυπα με μεγάλη διαφοροποίηση τρόπων χρήσης, είναι ιδιαίτερα επιθυμητές λύσεις αρχιτεκτονικής που μπορούν να προγραμματιστούν και να ρυθμιστούν έτσι ώστε αυξάνοντας το δυνατό αγοραστικό κοινό, να μειωθεί το κόστος επεξεργασίας ανά chip. Στις μέρες μας, τα ASIPs (Application-Specific Instruction-set Processors) δεν είναι εφικτά λόγων των υψηλότατων απαιτήσεων απόδοσης/ενέργειας. Ωστόσο, το κενό που υπάρχει με τα ASICs μπορεί κατά μεγάλο μέρος να γεφυρωθεί ή και να εξαλειφθεί, εισάγοντας και χρησιμοποιώντας ποιο δυναμική συμπεριφορά στην ψηφιακή front-end λειτουργικότητα. Για να επιτευχθεί αυτό, απαιτούνται καινοτομίες στην πλευρά της αρχιτεκτονικής του επεξεργαστή και ειδικότερα στον τρόπο που οι αλγόριθμοι αντιστοιχίζονται σε αυτές τις απαιτήσεις. Ξεκινώντας από παλαιότερα πειράματα που έδειξαν ότι η ιδέα αυτή είναι εφικτή, τα αντιπροσωπευτικά αλγοριθμικά τμήματα (με βάση κυρίως τον FFT) θα αντιστοιχηθούν στην επιλεγμένη αρχιτεκτονική ASIP για εφαρμογές στα 60 GHz. Σε αυτά τα πλαίσια, θα εφαρμοστεί η μεθοδολογία του διαγράμματος ροής εκτιμήσεων υψηλής κλίμακας (high level estimations flowchart). Πιο συγκεκριμένα, αρχικά θα αποκτηθεί μια πιο ακριβής καταγραφή του λειτουργικού κόστους της αλυσίδας φορτίου δεδομένων του ψηφιακού μέρους του δέκτη που υλοποιεί το πρότυπο επικοινωνιών στα 60 GHz. Στη συνέχεια θα κβαντιστούν οι πιο πολύπλοκοι, λειτουργικά, πυρήνες της αλυσίδας, όπως θα προκύψει από το προηγούμενο βήμα και τελικά οι πυρήνες αυτοί θα αντιστοιχηθούν σε αναδιαμορφώσιμα αρχιτεκτονικά μοντέλα. Η εργασία θα επικεντρωθεί στον FFT, που αναμένεται να έχει τη μέγιστη λειτουργική πολυπλοκότητα και θα προταθεί μια διαφορετική προσέγγιση για τον τρόπο προσπέλασης των δεδομένων και των συντελεστών στην SRAM και το register file, με στόχο την ελάττωση της κατανάλωσης ενέργειας του πυρήνα αυτού. Τέλος, θα παρατεθεί μια συγκριτική μελέτη των σχημάτων πρόσβασης που θα ερευνηθούν. Με αυτόν τον τρόπο μπορούν να ποσοτικοποιηθούν τα συνολικά κέρδη της έρευνάς μας. / In the domain of multi-gigabits per second wireless 60 GHz communication transceivers and beyond, today's implementations are all based on heavily customized application-specific integrated circuits (ASICs). The basic motivation for this customization is the extremely high processing speeds that are required, in combination with the need for low energy consumption. However, to support different standards and highly varying usage modes, more programmable or configurable architecture solutions are strongly desirable to increase the potential market volume and in this way to reduce the per-chip processing costs. Today these application-specific instruction set processors or ASIPs are not feasible due to the too high performance/energy requirements. Nevertheless, we believe that by introducing and exploiting more dynamic behavior in the digital front-end functionality, the performance/energy gap with the ASICs can be largely bridged and potentially even fully overcome. In order to achieve this, innovations are required on the processor architecture side and especially on the way algorithms are mapped to those architectures. In this thesis, we will start from earlier experiments which have shown the viability of the above concept. Τhe representative algorithmic blocks (mainly FFT oriented) will be mapped onto reconfigurable hardware based on ASIP architectures for 60 GHz applications. In this way we can quantify the overall gains and check how far the approach can be extended to exploit all the available dynamism using the concept of scenario clustering. In this context, we will follow the steps of the high level estimations flowchart methodology. In particular, we will obtain a more accurate account of the operational complexity of the digital base-band payload chain kernels, quantize the most complex of them and then map them in reconfigurable architectures. Especially for the FFT kernel, that is expected to show the highest complexity, we will implement a different approach in the accessing of the data and coefficients that intends to limit the energy usage of the kernel. For this purpose, we will end this work with a comparative study of different schemes explored.

abstract: ABSTRACT Ongoing research into wireless transceivers in the 60 GHz band is required to address the demand for high data rate communications systems at a frequency where signal propagation is challenging even over short ranges. This thesis proposes a mixer architecture in Complementary Metal Oxide Semiconductor (CMOS) technology that uses a voltage controlled oscillator (VCO) operating at a fractional multiple of the desired output signal. The proposed topology is different from conventional subharmonic mixing in that the oscillator phase generation circuitry usually required for such a circuit is unnecessary. Analysis and simulations are performed on the proposed mixer circuit in an IBM 90 nm RF process on a 1.2 V supply. A typical RF transmitter system is considered in determining the block requirements needed for the mixer to meet the IEEE 802.11ad 60 GHz Draft Physical Layer Specification. The proposed circuit has a conversion loss of 21 dB at 60 GHz with a 5 dBm LO power at 20 GHz. Input-referred third-order intercept point (IIP3) is 2.93 dBm. The gain and linearity of the proposed mixer are sufficient for Orthogonal Frequency Division Multiplexing (OFDM) modulation at 60 GHz with a transmitted data rate of over 4 Gbps. / Dissertation/Thesis / M.S. Electrical Engineering 2010

In this work  high gain antennas are investigated for the 60 GHz frequency. The goal is to produce a high bandwidth point-to-point wireless network that could enable improved and new features in embedded systems used to detect particles in high energy physics. A literature study was performed aiming at simple, high gain, highly polarised antennas. Complex designs were grouped into three different groups: flat antenna design, build-up design and multi-antenna design. The multi-antenna design was found to have the simplest design and manufacturing but also feature larger antenna area. Three different designs were produced and tested, standard patch antenna, long patch antenna and a Vivaldi antenna. Manufacturing of a 4-patch antenna was also tested. All three demonstrated expected properties, the Vivaldi shows the best gain while the long patch antenna is slightly below the standard patch antenna. A forth design implementation was also tested using a 3D-printed lens. A lens can increase gain and allow changing beam direction. A lens was design and tested, the results showed an increased gain but with varying results at angels. Antennas were designed and manufactured using simple etching technique showing that further research can be done using simple and easily accessible techniques. Both antenna and lens show good properties and should be further investigated and validated. / I det här arbetet har antenner med hög förstärkning vid frekvensen 60 GHz undersökts. Målet är att utveckla punkt-till-punkt nätverk med hög bandbredd för detektorer i partikelkolliderare. Idag används trådade nätvärk i detektorn, genom att byta till trådlös dataöverföring kan onödig massa minskas och kvalitet förbättras. En litteraturstudie genomfördes med inriktning mot enkla, starkt förstärkande och kraftigt polariserad antenner. Tre olika typer defineras: platta designer, uppbygda designer och antenngrupper. Antenngrupper var de med enklaste design och tillverkning men också de med störst area relativt de andra. Tre olika antenner tillverkades och testades: patchantenn, lång patchantenn och Vivaldiantenn. Även en 4-patch antenn tillverkades. Produktionen av alla antenner höll hög kvalitet och de testade egenskaperna var förväntade. Vivaldiantennen hade starkast förstärkning av de testade antennerna, den långa patchantennen presterade strax under standard patchantennen. Även tester av en antenngrupp bestående av en patch antenn oc hen antennlins gjordes. Genom att använda en lins kan förstärkningen ökas och riktningen ändras. En lins designades och tillverkades med en 3D-skrivare. Resultat från tester visade på en ökad förstärkning men med varierande resultat vid vinklar. Antenner designades och tillverkades med en enkel etsningsmetod, detta visar att forsatta undersökningar kan utnyttja enkel och lättilgänlig teknik. Goda resultat uppvisades med både antenner och lins. Framtida studier kan utföras för att vidarutveckla och validera konceptet.

La vision future de l'internet des objets (IdO) et Internet du Tout (OIE) plongera les personnes soi-disant environnements intelligents impliquant un grand nombre de secteurs d'applications telles que l'habitat intelligent, smart-villes, surveillance de l'environnement, l'e-santé ... IdO et l'OIE ont tendance à faire des objets du quotidien lisible, identifiable, localisable, adressable et contrôlable via le déploiement sans fil généralisée et l'Internet. Parmi ces capacités, la localisation et plus largement le positionnement omniprésente joueront, dans un proche avenir, un rôle clé pour promouvoir une autre vision émergente: un Internet spatio-temporelle des lieux (IoP), qui serait en mesure de structurer et d'organiser, par des moyens des approches sans fil d'énergie savez, le contenu spatial d'Internet. Il est bien connu que dans les réseaux locaux sans fil et personnelles, l'encombrement du spectre, les communications à faible efficacité énergétique et l'exploitation insuffisante des ressources spatiales sont parmi les facteurs qui peuvent ralentir son développement en termes de débit et de l'autonomie. Pour surmonter ces restrictions inévitables, la technologie de localisation sans fil, comme le mécanisme pour découvrir relation spatio-temporelle entre les objets connectés, apparaît ici aussi comme une des solutions clés. Ce est parce que les techniques de localisation dédiés à la communication sans fil peuvent aider à développer plus largement l'exploitation des ressources spatiales et de permettre la conduite routage optimisé pour une faible énergie communication multi-hop et la décongestion du spectre pour Green ICT (Information et Communication Technology). Pour proposer des systèmes optimisés atteindre à la fois la communication des taux de données élevés et la localisation précise, nous définissons un TDOA bien adapté (Time Difference of Arrival) méthode basée en mesure d'effectuer la localisation basée sur des signaux de communication et de données seulement. Avec cette technique, contrairement estimations TDOA classiques, il est possible de diminuer considérablement la complexité des infrastructures nécessaires en utilisant des configurations SIMO (Single Input Multiple Output), MISO (Multiple Input Single Output) ou MIMO (Multiple Input Multiple Output) dans les objets connectés . Toute cette étude est faite dans le cadre de l'IEEE 802.11ad spécifications de l'alliance standard et WiGig, mais les solutions proposées sont compatibles avec d'autres normes et peuvent être étendues à d'autres applications de contexte courant nécessitant entrées de localisation tels que la robotique par exemple ou de shopping intelligent... / The forthcoming vision of Internet of Things (IoT) and Internet of Everything (IoE) will immerse people in so-called Smart Environments involving a great number of sectors of applications such as smart habitat, smart-cities, environment monitoring, e-health… IoT and IoE tend to make everyday objects readable, recognizable, locatable, addressable and controllable via the widespread wireless deployment and the internet. Among these capabilities, localization and more extensively the ubiquitous positioning will play, in the next future, a key role to promote another emerging vision: a spatio-temporal Internet of Places (IoP), which would be able to structure and organize, by means of wireless energy aware approaches, the spatial content of Internet. It is well known that in wireless local and personal area networks, the spectrum congestion, the low energy efficiency communications and the insufficient exploitation of the spatial resources are among the factors that may slow down its development in terms of throughput and autonomy. To overcome these unavoidable restrictions, wireless localization technology, as the mechanism for discovering spatio-temporal relationship between connected objects, appears here also as one of the key solutions. This is because dedicated localization techniques in wireless communication can help in developing more extensively the exploitation of spatial resources and allow driving optimized routing for low energy multi-hop communication and spectrum decongestion for Green ICT (Information and Communication Technology). To propose optimized systems achieving both high data rate communication and precise localization, we define a well suited TDOA (Time Difference of Arrival) based method able to perform localization based on communication signals and data only. With this technique, unlike conventional TDOA estimations, it is possible to drastically decrease the complexity of required infrastructures by using either SIMO (Single Input Multiple Output), MISO (Multiple Input Single Output) or MIMO (Multiple Input Multiple Output) configurations in connected objects. This whole study is made within the framework of the IEEE 802.11ad standard and WiGig alliance specifications, however the proposed solutions are compatible with other standards and can be extended to other context aware applications requiring localization inputs such as robotics for example or smart shopping...

In this thesis, the design fabrication and characterization of a 2 x 8 microstrip planar antenna array operating at the 60 GHz band for Wireless Gigabit Alliance (WiGig) applications are presented. The trade-offs among low production costs, performance, and ease of fabrication were considered. Full-wave electromagnetic (EM) analysis is implemented for the antenna design by using |ANSYS®High Frequency Structural Simulator (HFSS), a finite-element EM solver. The antenna structure consists of two layers, where each array element is a Conductor-Backed Coplanar Waveguide (CB-CPW) loop-fed patch antenna. The bottom layer houses the transmission line and feeding circuitry, while the patch antennas are built on the top layer. The transmission line is designed on microfabrication-compatible quartz substrate, and the patches on a Rogers RO3003 Printed Circuit board (PCB) substrate. The CPW network's right-angle bends are optimized with chamfered lines. Air bridges are used to suppress the parasitic coupled slot line mode of the CPW line divisions. Results of the EM analysis show that the array covers the United States (US) 60 GHz unlicensed band (57-64 GHz), and has a maximum realized gain of 18 dB at 61 GHz on the broadside direction. The antenna design is later fabricated combining microfabrication and standard PCB procedures.

The scope of this work is the development of a 60 GHz flexible transceiver frontend by adopting an economic prototyping approach. Such a platform can validate the proposed protocols for the 60 GHz band in a real wireless environment, especially the physical layer security concept. The development course uses the hybrid architecture with off-the-shelf components and custom-designed RF chain blocks on printed circuit technology. Challenge in this approach is the coarse resolution of the selected manufacturing technology and higher process tolerance. This work extends the state-of-the-art by proposing etching-resilient RF chain blocks on wide bandwidths. It presents the design validation of each block and performance analysis for various manufacturing conditions. The study also reviews and proposes a high-frequency interconnect model for bondwires, vital in a frontend design. Parasitics' compensation of the interconnects at millimeter-wave operation is proposed, compatible with printed circuit technology. The 60 GHz frontend is realized by packaging the designed RF blocks and off-the-shelf components with optimized and characterized high-frequency interconnects. The frontend, equipped with a tailor-made antenna duplexer, is reconfigurable for frequency, power, and modulation scheme. The developed frontend is characterized for local oscillator, transmitter, and receiver operations. The adaptability of the frontend allows it to be used as an agent in a heterogeneous network. Two units of the developed frontends are used in a network for frequency domain channel sounding. The antenna duplexer ensures channel reciprocity in bidirectional sounding campaigns. Matched two-way channel response is achieved in various indoor environments, which endorses the frontend for channel reciprocity key generation. Finally, the frontend units are successfully deployed in a physical layer security demonstrator.:Abstract Chapter1: Introduction Chapter 2: Fundamentals and state-of-the-art Chapter 3: The design Chapter 4: Integration and characterization Chapter 5: Application example: Channel sounder Chapter 6: Summary and future work Appendices Bibliography

In 2001, the Federal Communications Commission made available a large block of spectrum known as the 60 GHz band. The 60 GHz band is attractive because it provides the opportunity of multi-Gbps data rates with unlicensed commercial use. One of the main challenges facing the use of this band is poor propagation characteristics including high path loss and strong attenuation due to oxygen absorption. Antenna arrays have been proposed as a means of combating these effects. This thesis provides an analysis of array processing for communication systems operating in the 60 GHz band. Based on measurement campaigns at 60 GHz, deterministic modeling of the channel through ray tracing is proposed. We conduct a site-specific study using ray tracing to model an outdoor and an indoor environment on the Virginia Tech campus. Because arrays are required for antenna gain and adaptability, we explore the use of arrays as a form of equalization in the presence of channel-induced intersymbol interference. The first contribution of this thesis is to establish the expected performance achieved by arrays in the outdoor environment. The second contribution is to analyze the performance of adaptive algorithms applied to array processing in mobile indoor and outdoor environments. / Master of Science