The demand for low-power A/D conversion techniques has motivated the exploration of charge-transfer amplifiers (CTAs) to construct efficient, precise voltage comparators. Despite notable advantages over classical, continuous-time architectures, little is understood about the dynamic behavior of CTAs or their utility in precision A/D converters. Accordingly, this dissertation presents several advancements related to the design and analysis of charge-transfer amplifiers for low-power data conversion. First, an analysis methodology is proposed which leads to a deterministic model of the voltage transfer function. The model is generalized to any timing scheme and can be extended to account for nonlinear threshold modulation. The model is compared with simulation results and test chip measurements, and shows good agreement over a broad range of circuit parameters. Three new charge-transfer amplifier architectures are proposed to address the limitations of existing designs: first, a truly differential CTA which improves upon the pseudo-differential configuration; second, a CTA which achieves more than 10x reduction in input capacitance with a moderate reduction in common mode range; third, a CTA which combines elements of the first two but also operates without a precharge voltage and achieves nearly rail to rail input range. Results from test chips fabricated in 0.6 um CMOS are described. Power dissipation in CTAs is considered and an idealized power consumption model is compared with measured test chip results. Four figures of merit (FOMs) are also proposed, incorporating power dissipation, active area, input charging energy and accuracy. The FOMs are used to compare the relative benefits and costs of particular charge-transfer amplifiers with respect to flash A/D converter applications. The first 10-bit CTA-based A/D converter is reported. It consumes low dynamic power of 600 uW/MSPS from a 2.1 V supply, 40% less than the current state of the art of 1 mW/MSPS. This subranging type converter incorporates capacitive interpolation to achieve a nearly ideal comparator count and power consumption. A distributed sample-and-hold (S/H) eliminates the need for a separate S/H amplifier. A test chip, fabricated in 0.6 um 2P/3M CMOS, occupies 2.7 mm2 and exhibits 8.2 effective bits at 2 MSPS.

The rapidly developing wireless market has spawned a multitude of different standards for cellular, PCS, and wireless data. To allow users the ability to access services conforming to disparate standards, multimode handsets capable of software reconfiguration are needed. These "software radios" are distinguished from their traditional counterparts by their strong reliance on digital channel filtering and demodulation which may be reprogrammed to receive different standards. In these radios, higher dynamic range is required from the analog portion, most notably, the analog-to-digital converter (ADC). This research examines through analysis and simulation the performance requirements of analog-to-digital converters for use in radios which are conformant to the AMPS, IS-54, GSM, and IS-95 cellular standards. Simulations reveal the degradation in performance under conditions of off-channel interference, fading, and converter nonlinearities. Included in this analysis is the design of automatic gain control (AGC) for narrowband and IS-95 spread spectrum systems to optimize quantization noise and distortion due to A/D overload. Lastly, methods for improving the dynamic range of the analog-to-digital interface such as nonuniform quantization, companding, and dither are presented. The development of a novel A/D using a direct-sequence pseudo-noise (DSPN) technique in conjunction with an asymmetrical quantizer is presented and compared with standard dither techniques. Advantages of this technique compared to ordinary ADC's include an almost one bit improvement in resolution, quantization noise whitening, elimination of A/D offsets, and the ability to simultaneously digitize multiple analog signals with a single quantizer. The technique requires no synchronization and is easily implemented. / Master of Science

The aim of the thesis is weigh measurement using strain gauges from cheap digital scales. Work describes problems connected with using strain gauges as temperature compensation and requirements for accurate voltage reference and summarize function and wiring of chaep digital scales using four strain gauges. Result of work is design of an electrical circuit for weigh measurement using four strain gauges from analyzed scale.

The thesis focuses on implementation of a hot runner controller for injection molds for plastic materials with a maximum number of 56 regulated zones. The first part of the thesis deals with already existing and used solutions of the given subject. The following part of the thesis describes the principles of temperature measurement by means of thermoelectric sensors, including their linearization as well as communication protocols MODBUS, EUROMAP 17. The identification of a regulated system ( heating zone) has been carried out before the hardware design. The development process is divided into some parts : system conception, hardware design, software development. The controller consists of measuring modules designed to collect data and handle power controllers for management of performance of heating elements. The necessary calculation power is integrated into the controllling computer. All parts of a hot runner controller are implemented taking into account the costs.

<p>Master thesis work at ITN (Department of Science and Technology) in the areas of A/D-construction and RF-circuit design. Major goal of project were to research suitable possibilities for implementations of direct conversion in transceivers operating in the 160MHz band, theoretic study followed by development of components in the construction environment Cadence. Suitable A/D- converter and other important parts were selected at the end of the theoretic study. Subsampling technique was applied to make A/D sample requirements more realistic to achieve. Besides lowering requirements on A/D-converter it allows a more simple construction, which saves more components than subsampling adds. Subsampling add extra noise, because of that an A/D-converter based on the RSD algorithm was chosen to improve error rate. To achieve high bit-processing rate compared to the used number of transistors, pipeline structure were selected as conversion method. The receiver was that part which gained largest attention because it’s the part which is most interesting to optimise. A/D-conversion is more difficult to construct than D/A conversion, besides there’s more to gain from eliminating mixers in the receiver than in the transmitter.</p>

Master thesis work at ITN (Department of Science and Technology) in the areas of A/D-construction and RF-circuit design. Major goal of project were to research suitable possibilities for implementations of direct conversion in transceivers operating in the 160MHz band, theoretic study followed by development of components in the construction environment Cadence. Suitable A/D- converter and other important parts were selected at the end of the theoretic study. Subsampling technique was applied to make A/D sample requirements more realistic to achieve. Besides lowering requirements on A/D-converter it allows a more simple construction, which saves more components than subsampling adds. Subsampling add extra noise, because of that an A/D-converter based on the RSD algorithm was chosen to improve error rate. To achieve high bit-processing rate compared to the used number of transistors, pipeline structure were selected as conversion method. The receiver was that part which gained largest attention because it’s the part which is most interesting to optimise. A/D-conversion is more difficult to construct than D/A conversion, besides there’s more to gain from eliminating mixers in the receiver than in the transmitter.

This work deals with the design of a galvanically isolated converter of continuous analog signals and the design of a galvanically separated converter of digital TTL signals to HTL signals. The device is complemented by a STM32 microprocessor, which ensures the connection of analog input and output. The result of the work is the circuit structure of individual units, the results of simulations of important units, complete data for the production of device and measured values of individual units.

Heart rate variability belongs to basic and most frequently interpretation of physiologic statement in medicine. The pulse rate serves as an indicator of the heart activity. The subject of this diploma thesis is projection of the heartbeat counter. The work describes electrocardiograph and separated waves, ways of calculation heart rate, characteristics mechanism for measuring and other necessary information about heart rate measuring. This master thesis fixates on heart rate-calculation from including R-R intervals. Here is described whole project of heartbeat counter, properties of separated blocks and calculation of useful parameters. Further there is noted software resolution for the microcontroller and program for the calculation of heart rate frequency including unwinding signal preprocessing and detection of separated QRS complexes. The products of this diploma thesis are the circuit including the board circuit and codes of separated programs.

The objective of this thesis is a design of a development kit, which is used in laboratories during the lessons of Theory of analog to digital conversion subject. This device is adapted for basic measuring and understanding of digital to analog (D/A) and analog to digital (A/D) converters and contains sigma-delta A/D converter made of basic elements, D/A converter with R-2R resistor net, active low pass frequency filter (Sallen-Key), PWM generator, SAR A/D converter with 16 b resolution, reference voltage source and module for measuring integral and differential nonlinearity of A/D converters. The modules are available connect to each other via jumpers and they are driven by microcontroller. This solution gives various modes of operation, which can be selected by user via buttons. Development kit has five BNC connectors for securing connectivity to an oscilloscope or a signal generator. The device also contains universal serial bus connectivity for use with personal computer or laptop, which is really useful with Matlab software for automation processing of measuring.

The master thesis includes a literature search, which is focused on questions around panel measure instruments for measuring analog voltage signals. There is the block diagram and the concept of measuring voltage values designed from collected information and defined requirements to the device. In the next step a design of the circuit diagram is created and published and consequently transferred into PCB. The whole board has been fabricated, assembled and tested. The firmware development starts with the definition of basic functional blocks for using of internal elements of the device, which is followed by the implementation of the Modbus slave station service routine. The top part presents graphical user interface on the device.