Thesis (M.S.) in Electrical Engineering--University of Maine, 2002. / Includes vita. Includes bibliographical references (leaves 67-68).

Thesis (Ph. D.)--University of Texas at Austin, 2007. / Vita. Includes bibliographical references and index.

Thesis (Ph. D.)--Oregon State University, 2009. / Printout. Includes bibliographical references (leaves 80-86). Also available on the World Wide Web.

Thesis (Ph. D.)--Oregon State University, 2009. / Printout. Includes bibliographical references (leaves 76-77). Also available on the World Wide Web.

In this research study, several new in-orbit algorithms are proposed to improve the performance of Attitude Determination and Control System (ADCS) by estimating the inertia matrix and calibrating the cold gas thruster system of the UoSAT-12 spacecraft. Computer-based simulation models will be constructed using MATLAB and SIMULINK in order to evaluate the expected performance. The first focus is on the identification of the satellite inertia matrix. A new algorithm based on a Recursive Least Square (RLS) estimation technique is proposed for in-orbit use to estimate the inertia matrix (moments and products of inertia parameters) of a satellite. To facilitate this, one attitude axis is disturbed using a reaction wheel whilst the other two axes are controlled to keep their respective angular" rates small. Within a fraction of an orbit three components of the inertia matrix can be accurately determined. This procedure is then repeated for the other two axes to obtain all nine elements of the inertia matrix. The procedure is designed to prevent the build up of momentum in the reaction wheels, whilst keeping the attitude disturbance to the satellite within acceptable limits. It can also overcome potential errors introduced by unmodeled external disturbance torques and attitude sensor noise. The second focus is on a new algorithm for in-orbit use to calibrate thruster coefficients for thrust level and alignment, using three reaction wheel actuators. These algorithms will ensure robustness against modeling errors. The algorithms assume no prior knowledge of the thruster parameters and only an initial guess of the inertia matrix. It is proposed that this calibration can be used during normal mission conditions when the satellite is stabilised. The final goal of this research study was to apply the proposed algorithms in real-time. Firstly, the thruster calibration algorithm was tested on an air-bearing table. Finally, both thruster calibration and moment of inertia algorithms were tested using data generated by UoSAT-12 while in orbit. The practical estimation results proved the feasibility of proposed algorithms.

Low-power and small size analog to digital converters (ADCs) are the strategic building blocks in state of the art mobile wireless communication systems. Various techniques have been developed to reduce both power consumption and die area of the ADC. Among these, the opamp-sharing technique shows the most promise. In opamp-sharing, power and die area are saved by sharing one opamp between two successive pipeline stages. However, this technique suffers from the well-known memory effect drawback due to the absence of the reset phase that discharges the opamp's input parasitics. In this dissertation, this drawback is solved by introducing a discharge phase before the opamp is used for the pipeline stages without compromising speed and resolution of the ADC. Further power and area reduction is achieved by using a capacitor-sharing technique. This technique reduces the effective load capacitance of the opamp by reusing the charge on the feedback capacitor for the MDAC operation of the following stage, resulting in faster settling without increasing opamp power. The proposed low input-capacitance variable-gm opamp also helps to reduce the memory effect and improves the settling behavior of the stage output by increasing the bandwidth of the opamp while input parasitics of the opamp are kept small. The prototype designs of a 10-bit 50MSample/s pipelined ADC and a 14-bit 100MSample/s pipelined ADC implemented in 0.18¹m CMOS technology demonstrate the effectiveness of the proposed techniques. The first ADC achieves 56.2dB SNDR and 72.7dB SFDR for a Nyquist input at full sampling rate while consuming 12 mW from a 1.8-V supply. The FOM, defined as, [power/2[superscript ENOB].Fs], is 0.46 pJ/step with Fin = 24.5MHz at 50MS/s. The second ADC achieves 72.4dB SNR and 88.5dB SFDR at 100MS/s with a 46MHz input and consumes 230mW from a 3V supply. The FOM of the second ADC is 0.69 pJ/step with Fin = 46MHz at 100MS/s.

This dissertation introduces novel techniques for exploiting the environmental aerodynamic forces to actively control the attitude of the spacecraft operating in the lower and middle thermosphere. It includes both simulations and real spacecraft attitude determination and control subsystem development, which provide a complete picture of the application of the aerodynamic forces to benefit space missions that are operating very close to Earth, as well as contribute to the knowledge of rarefied gas aerodynamics in the lower and middle part of the thermosphere. The research starts by reviewing the current progress of thermosphere science and rarefied gas aerodynamics to construct a high fidelity aerodynamic model for spacecraft operating in the rarefied gas (mainly atomic oxygen) environment in very low Earth orbits (below 450 km) and following by a brief system level analysis of the benefits and challenges for the spacecraft flying lower to Earth. A real spacecraft is also developed to validate of the application of the aerodynamic forces for attitude control. The aspect of the design included in this dissertation focuses mainly on the attitude determination and control system development of satellite. The CubeSat has a generic design with deployable solar panels that can be rotated to control the aerodynamic torques. Based on the common attitude control requirements of spacecraft operating in very low Earth orbits, and the hardware capability of the satellite three novel orbital aerodynamic attitude control strategies are proposed: Energy Optimized B-dot Detumbling into an Aerostable State; Active Orbital Aerodynamic Coarse Pitch/Yaw Control; a 3-axis Orbital Aerodynamic Torques Adaptive Sliding Mode Control. The control performance for each control algorithm is validated numerically in high-fidelity attitude propagators. Knowledge of the thermospheric winds is important as they influence the control performance and the dynamic response of the spacecraft, aerostable designs steering into the thermosphere wind vector. Two novel computational methods to measure the thermospheric wind from the dynamic response of the spacecraft due to aerodynamic forces are proposed. The in-situ measured wind vector benefits the attitude observation in the feedback control systems, which helps to improve the adapting performance and to increase the control accuracy. The proposed novel aerodynamic attitude control algorithms can be adapted for similar spacecraft operating in the very low Earth orbits with modifications to the deployable solar panels or adding movable aerodynamic control surfaces. In addition, this proposed orbital aerodynamic attitude control system works not only in the very low Earth orbits but can also be potentially implemented for spacecraft operating in the rarefied gas region of the atmospheres of other planets.

<p>The thesis demonstrates a low-cost, low-bandwidth and low-resolution Analog-to- Digital Converter(ADC) in 0.35 um CMOS Process. A second-order Sigma-Delta modulator is used as the basis of the A/D Converter. A Semi-Uniform quantizer is used with the modulator to take advantage of input distributions that are dominated by smaller-amplitude signals e.g. Audio, Voice and Image-sensor signals. A Single-bit feedback topology is used with a multi-bit quantizer in the modulator. This topology avoids the use of a multi-bit DAC in the feedback loop – hence the system does not need to use digital correction techniques to compensate for a multi-bit DAC nonlinearity. </p><p>High-Level Simulations of the second-order Sigma-Delta modulator single-bit feedback topology along with a Semi-Uniform quantizer are performed in Cadence. Results indicate that a 5-bit Semi-Uniform quantizer with a Over-Sampling Ratio of 32, can achieve a resolution of 10 bits, in addition, a semi-uniform quantizer exhibits a 5-6 dB gain in SNR over its uniform counterpart for input amplitudes smaller than –10 dB. Finally, this system is designed in 0.35um CMOS process.</p>

Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that involves high-performance analog-to-digital conversion combined with very low power consumption. This dissertation presents two different approaches to achieving high power efficiency from a two-step pipelined architecture, which is generally known as one of the most power-consuming analog-to-digital converters. In the first approach, an analog feedback loop of a residue amplifier in a two-step pipelined analog-to-digital converter is reconfigured digitally using a single comparator and an R-2R digital-to-analog converter. This comparator-based structure can reduce power consumption of a conventional two-step pipelined analog-to-digital converter which consists of an opamp-based residue amplifier followed by a second- stage analog-to-digital converter. In addition, this dissertation includes circuit design techniques that provide a digital offset correction for the comparator-based two-step structure, binary-weighted switching for an R-2R digital-to-analog converter, and reference trimming for a flash analog-to-digital converter. A 10-b prototype analog-to-digital converter achieves an FOM of 121 fJ/conversion-step under 0.7-V supply. The second approach provides a way to achieve low power consumption for a high-resolution two-step pipelined analog-to-digital converter. An opamp is designed to consume optimized static power using a quarter-scaled residue gain together with minimized loading capacitance from the proposed second stage. A 14-b prototype analog-to-digital converter achieves an FOM of 31.3 fJ/conversion-step with an ENOB of 11.4 b, which is the lowest FOM in high-resolution analog-to-digital converters having greater than an ENOB of 10 b. Finally, the potential for further power reduction in a two-step pipelined analog-to-digital converter is discussed as a topic for future research. / Graduation date: 2012

Thesis (M.S.)--Oregon State University, 2007. / Printout. Includes bibliographical references (leaves 82-86). Also available on the World Wide Web.