In the design of the recently embedded processor, besides paying attention to low power consumption and reducing the complexity of the design, it is also necessary to be with high performance. Because of the advanced logic CMOS technology, incorporated multiple processor cores on a single chip becomes the new trend which improve performance. This thesis, being designed for the embedded processor, presents a superscalar dual core architecture for ARM9 ISA. The processor provides three operation modes: single-core mode, superscalar mode, and multithreading mode for designer. The processor can be switched dynamically in three mode with the new extended instructions, when it is executing the program. When the processor is executing in superscalar mode, the designer can use the processor without changing any setting of the original environment. According our simulation result, the superscalar dual core architecture can obtain 52% performance speedup when it execute the trace of MPEG2 decoder and obtain average 41% performance speedup comparing to the five-stage pipelined ARM9 architecture.

In this paper, we will explore architecture variations of ARM7 microprocessors. The ARM7TDMI is a 32-bit microprocessor developed by ARM Ltd. It used in embedded application such as mobile phones, pager and PDAs. However, as portable products grow in complexity more processing power is required. This paper focuses on the implementation of the architecture variations of ARM7 microprocessors. The evolutions from our RTL design to architecture variations are described and the trade offs between high performance and low gate count discussed.

This paper has mentioned the detailed process in which MP3 has been porting so as to being executed on the plate of ARM9 and working device of AACI¡BMMU¡BI-Cache¡BD-Cache¡BDMA¡BI-TCM¡BD-TCM on the developing board of Versatile VPB926EJS; the device has reduced clock Rate of ARM926EJ CPU. On the basis of lowest Clock Rate, the software of MP3 player could be executed smoothly with the little hardware resource.

The main subject of this thesis is implementation of operating system based on Linux kernel. The thesis demonstrates ARM architecture and the programming model of this architecture very briefly. Then it explains initialization process of most significant peripherals including serial interfaces and memory controllers and describes booting process form NAND, NOR memory and UART interface. At the end it shows compiling procedures necessary for building u-boot and kernel.

The aim of this work is to describe the basic mechanisms of memory management and access to peripherals via EBI at the ARM9 microcontroller family. It is a solution for connecting physical ethernet interface, SD / MMC card to the device and design a development kit with the ability to connect a hard or SSD drive. The second part is aimed at operating system Linux, its modification for the ARM9 family of microcontrollers and installing software packages.

<p>A dual core Atmel DIOPSIS 940 chip consists of a DSP and an ARM9 functional units in a single silicon die. This thesis presents the process of integration and assessment of using this processor in a flight control system. A complete design of the system is provided including a description of the DIOPSIS 940 from the perspective of requirements of the application. The integration of the processor with a typical set of components of a flight control system is provided. Additionally, a suite of programs required for developing software for the system is included. Capabilities of both cores of the processor are analysed in a series of experiments. Computational performance in typical tasks of a flight control system is analyzed and compared. The application of attitude stabilization for a micro-scale UAS is described.</p>

A dual core Atmel DIOPSIS 940 chip consists of a DSP and an ARM9 functional units in a single silicon die. This thesis presents the process of integration and assessment of using this processor in a flight control system. A complete design of the system is provided including a description of the DIOPSIS 940 from the perspective of requirements of the application. The integration of the processor with a typical set of components of a flight control system is provided. Additionally, a suite of programs required for developing software for the system is included. Capabilities of both cores of the processor are analysed in a series of experiments. Computational performance in typical tasks of a flight control system is analyzed and compared. The application of attitude stabilization for a micro-scale UAS is described.