In this thesis, we integrate the memory subsystem, including cache and MMU¡]Memory Management Unit¡^ with the embedded 32 bits microprocessor SYS32TM-II to support the virtual memory mechanism of the operating system and make memory management effectively among multi-processes in the system. To provide the virtual to physical address translation with MMU and to improve the system performance with cache. We reuse the memory subsystem of the LEON2 SoC platform and design the communication interface to coordinate the processor core SYS32TM-II with the LEON2 memory subsystem, and modify the LEON2 memory subsystem to compatible with SYS32TM-II. After the integration of memory subsystem, a reusing cache for program address trace compression in real time is proposed. The advantage is that reusing cache with minor hardware modification can not only save the hardware compressor overhead but also obtain a high compression ratio. Experimental results show that the proposed approach causes few hardware area overhead but achieves approximately 90% compression ratio at real-time. Therefore, this thesis is the memory subsystem with parameterized design and with the ability to support system debugging. The role of the memory subsystem is not only to improve the system performance and to provide the hardware support requiring by the operating system, with minor modification, the memory susbsystem can also capture the dynamic program execution trace in parallel with microprocessor. The address trace compression mechanism will not effect the program execution and capable to compress at real-time.

Memory management unit (MMU) is a hardware component providing above all the translation of virtual addresses to physical addresses and thus providing secure isolation of kernel and processes. HelenOS is a research operating system which is being developed at MFF UK. The kernel of HelenOS uses hardware MMU of the processor for virtual to physical memory translation using paging. The goal of this work is to provide an overview of the techniques which can be used to (partially) substitute the functionality of MMU by other means. A proposed design, analysis and prototype implementation of an extension to HelenOS is also part of this work. This extension enables functionality of HelenOS on processors without MMU.

<p>The car industry has created a series of standards called AutoSAR as a response to the increasing number of processors in modern vehicles. Among these specifications is one for real-time operating systems (RTOS). This RTOS standard includes requirements for memory protection. This thesis outlines the work involved in introducing the memory protection outlined in this specification in the OSEck operating system. The work consisted of updating the operating system, implementing the AutoSAR OS API, and updating the suite of toolsused to build the finished system.The AutoSAR specifications were found to be very thorough and well thoughtout. The OS API was successfully implemented, and the data-structures needed to permit its functionality. The existing software tools were updated to conformwith the new requirements from AutoSAR, and additional software was createdto ease the configuration process.Memory protection was successfully implemented in the OSEck operating system, including two implementations of the trap interface. The memory protection functionality adds yet another layer of user-configuration to the operating system. Also, additional overhead for system calls, context switches and message passing is expected. A general evaluation of how OSEck application performance is aff ected is beyond the scope of this thesis, but preliminary studies of additional instruction counts on certain system calls have been performed.</p>

With the advanced of the technique, we can design more IP in the same area space chip. The embedded system has more powerful about its application. We need to have a more efficient core processor to support the whole embedded system in complex system environment. The main purpose of this paper is increased the calculated speed, memory management and debugging for SYS32TME III, which is designed by our lab as an ARM10 like processor. We integrate the cache/MMU and EICE( Embedded in-circuit emulator ) into the embedded processor core. Using the cache/MMU, we can not only speed up the processor which access external memory time but also use the virtual address for Operating System. In order to keep the correctness of the system and speed up the system integration time, we use five functional (cache off, cache on and MMU off with cache hit/miss, cache on and MMU on with cach hit/cache miss and TLB hit/cache miss and TLB miss) tests to verify the cache/MMU and six coprocessor instructions (LDC, MCR, MCRR, MRC, MRRC, STC ) to verify the EICE. After that, we also use the regression test about the microprocessor, cache/MMU and EICE system integration. In the end, we turned the performance about the integrated cache/MMU and EICE, so that we can support an 200MHz ARM 10-like processor by 0.18£gm.

This paper has mentioned the detailed process in which MP3 has been porting so as to being executed on the plate of ARM9 and working device of AACI¡BMMU¡BI-Cache¡BD-Cache¡BDMA¡BI-TCM¡BD-TCM on the developing board of Versatile VPB926EJS; the device has reduced clock Rate of ARM926EJ CPU. On the basis of lowest Clock Rate, the software of MP3 player could be executed smoothly with the little hardware resource.

The car industry has created a series of standards called AutoSAR as a response to the increasing number of processors in modern vehicles. Among these specifications is one for real-time operating systems (RTOS). This RTOS standard includes requirements for memory protection. This thesis outlines the work involved in introducing the memory protection outlined in this specification in the OSEck operating system. The work consisted of updating the operating system, implementing the AutoSAR OS API, and updating the suite of toolsused to build the finished system.The AutoSAR specifications were found to be very thorough and well thoughtout. The OS API was successfully implemented, and the data-structures needed to permit its functionality. The existing software tools were updated to conformwith the new requirements from AutoSAR, and additional software was createdto ease the configuration process.Memory protection was successfully implemented in the OSEck operating system, including two implementations of the trap interface. The memory protection functionality adds yet another layer of user-configuration to the operating system. Also, additional overhead for system calls, context switches and message passing is expected. A general evaluation of how OSEck application performance is aff ected is beyond the scope of this thesis, but preliminary studies of additional instruction counts on certain system calls have been performed.

Denna uppsats undersöker fem andraspråkselevers perspektiv av modersmålsundervisningen. Forskning visar att modersmålsundervisning påverkar elevers lärande och språkutveckling positivt. Syftet med studien är att komma åt andraspråkselevers attityder till och erfarenheter av modersmålsundervisningen men även att ta reda på hur eleverna upplever modersmålsundervisningen och om de ser den som något positivt som gynnar deras lärande och språkutveckling eller inte. Utöver detta beaktar studien omkringliggande omständigheter som kan påverka elevernas attityder och erfarenheter. Detta undersöks kvalitativt genom semistrukturerade intervjuer. Analys av intervjusvaren visar att majoriteten av informanterna anser att modersmålsundervisningen är viktig, leder till bättre självförtroende och självkänsla samt att de genom den kan bevara sitt ursprung. Slutsatsen är att modersmålet till stor del ses som viktig för eleverna som individer och bevarandet av deras ursprung. Däremot påverkas deras attityder till och erfarenheter av ämnet av omständigheter såsom modersmålsundervisningens plats, tid, längd och lärare.

This master's thesis deals with design and implementation of educational application forpaging. Goal of the application is to help students understand and practice some conceptsfrom paging. It will allow students to write parts of these concepts and see how their codework on visualization of simulation of memory system. Application will be implemented asa web application in HTML, CSS and JavaScript. Server, which will be taking care ofcompiling of user code will be a desktop application. This thesis mainly describes pagingand technologies which will be used for this thesis and application design. It also describesimplementations and testing of this work.