Existing linearisation methods were examined to establish the requirements for a wideband power amplifier model. A range of memoryless models were investigated, in particular polynomial models. No suitable memoryless models were found. The shortcomings of the models were analysed and directions for future investigations presented. / Thesis (MEng(ElectronicsEngineering))--University of South Australia, 2003

Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2004. / Includes bibliographical references. Also available in electronic version. Access restricted to campus users.

Thesis (Ph. D.)--University of Florida, 2005. / Title from title page of source document. Document formatted into pages; contains 132 pages. Includes vita. Includes bibliographical references.

Thesis (Ph. D.)--Ohio State University, 2007. / Title from first page of PDF file. Includes bibliographical references (p. 104-107).

Thesis (MScEng)--Stellenbosch University, 2004. / ENGLISH ABSTRACT: The aim of this thesis was to investigate the use of behavioral level models in receiver simulations using the capabilities of Agilent's Advanced Design System. Behavioral level modeling has become increasingly attractive because it offers faster and easier results for system level simulations. The work in this thesis focused strongly on nonlinear measurements to characterize the various nonlinear phenomena that are present in amplifiers and mixers. Measurement automation software was developed to automate the process. An error correction technique was also developed to increase the accuracy of spectrum analyzer measurements. The measured data was used to implement the behavioral level amplifier and mixer models in ADS. The accuracy of the models was compared to measured data and the different available models were compared. Finally the models were combined to realize different receivers and were used to do typical receiver tests. These test include gain and gain compression, two-tone intermodulation and spurious responses. The results are compared to measured data to test the accuracy and usefulness of the models and simulation techniques. / AFRIKAANSE OPSOMMING: Die doel van hierdie tesis was om stelsel-vlak gedrags-modelle te ondersoek soos hulle in Agilent se Advanced Design System (ADS) aangebied word. Die modellering van die stelselvlak-gedrag van komponente en stelsels is aantreklik aangesien dit 'n hoë vlak beskrywing van komplekse kommunikasie stelsels moontlik maak. Akkurate stelsel-vlak simulasies sal lei tot vinnige ontwikkeling en evaluasie van nuwe sisteme. Die resultate wat verkry word is egter afhanklik van die beskikbaarheid van akkurate stelsel-vlak gedragsmodelle Die tesis het baie sterk op metings staat gemaak om die nie-liniêre gedrag van versterkers en mengers te karakteriseer. Meet sagteware is ontwikkel om die verskillende metings te automatiseer. Fout korreksie vir spetrum-analiseerder-metings is ook ontwikkel. Die gemete data is gebruik om die nie-liniêre gedrags-modelle in ADS te implementer. Die modelle is in simulasies gebruik en die akuraatheid van die simulasies is teen gemete data getoets. Die finale deel van die tesis gebruik die modelle om tipiese ontvanger karakteristieke te voorspel. Die volgende toetse is gedoen: aanwins en kompressie, twee-toon intermodulasie en hoer orde meng produkte. Die resultate van die toetse is met gemete data vergelyk om die akuraatehied en bruikbaarheid van die verskillende modelle te vergelyk.

Thesis (MSCIng)--University of Stellenbosch, 2004. / ENGLISH ABSTRACT: Bi-polar Si transistors optimized for pulse conditions is still the most popular choice as amplification element in the final stages of solid-state radar amplifiers in L and S band. With the radar market being small, the design data for these devices is normally fairly limited and it is up to the designers to thoroughly characterize them for their designs. This is normally done through loadpull experiments. Professional automated load-pull equipment is very expensive especially at the higher power levels. In spite of being automated and under computer control, load-pull exercises still is very time consuming and as such expensive. For small companies that only occasionally need to design such amplifiers it is not economically viable to acquire such equipment and different strategies have to be found to stay competitive. This report investigates such a strategy and its implementation. A procedure to quickly and accurately characterize such devices was developed and two amplifiers were designed and build with this procedure and compared to their traditional counterparts for verification. The results were very promising and with a bit more work, the technique can likely be used to characterize these devices for design work outside of the parameters designated by the manufacturers. / AFRIKAANSE OPSOMMING: Bipolere Silikon transistors wat vir werking onder gepulsde toestande geoptimiseer is, is nog steeds die mees gewilde keuse as versterkingselement in die finale stadiums van vastetoestand radar versterkers in die L en S bande. Met die radar mark wat geredelik klein is, is die ontwerp inligting vir hierdie elemente gewoonlik redelik karig en is dit die taak van die ontwerpers om die elemente te karakteriseer vir hulle ontwerp doeleindes. Dit word normaalweg gedoen deur lastrek eksperimente. Geoutomatiseerde lastrek toerusting is baie duur, veral as dit onder hoë drywingstoestande moet werk. Al is die toerusting geoutomatiseer en onder rekenaar beheer, is lastrek oefeninge nog steeds baie tydrowend en daarom dan ook baie duur. Vir klein maatskappye wat net nou en dan nodig het om sulke versterkers te ontwerp is dit gewoon nie ekonomies regverdigbaar om sulke toerusting aan te skaf nie, en ander strategië moet gevind word om ekonomies kompeterend te bly. Hierdie verslag ondersoek so 'n strategie en die implimentering daarvan. n Prosedure om gepulsde bipolere transistore vinnig en akkuraat te karakteriseer is ontwikkel en twee versterkers is met die prosedure ontwerp en gebou. Die versterkers is geverifieer deur hulle met hulle tradisionele eweknië te vergelyk. Die resultate lyk baie belowend en met n bietjie meer werk kan die metode waarskynlik ook gebruik word om die transistors buite die toepassings gebied, soos deur die vervaardigers aangedui, te gebruik.

Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006. / Modern day digital modulation techniques in communication systems produce large peak-to-average ratios. To maintain linearity, power amplifiers have to operate at backed-off levels. This results in low efficiency with consequences such as high power consumption, short battery life and excessive heat in power amplifiers. A Doherty amplifier is an efficiency enhancement technique which increases an amplifier’s efficiency at backed-off levels. This thesis presents a design procedure for a Classical Doherty amplifier. A method where Sparameter measurements from a transistor are used to predict the transistor’s transmission phase response for varying input power is presented. This method is found to be accurate by comparing it to measurements done on a non-linear network analyser. The measured S-parameters are also used to design the Doherty amplifier at its predicted peak output power. Two Classical Doherty amplifiers are designed, manufactured and characterised. The measurements are performed on a custom measurement setup using in-house developed Matlab code to automate the measurements. The first Doherty amplifier used small-signal Siemens CFY30 GaAs FETs and the second Doherty amplifier used 10W Motorola MRF282 LDMOS transistors. The performance of both amplifiers is compared to similar balanced amplifiers and shows improvements in their efficiency. The improvement in efficiency for the 10W Doherty power amplifier in relation to a balanced amplifier is compared to results found in the literature and a good correspondence between the measured and published results were obtained.

This thesis will begin with an investigation on the limitations associated with the predominate two-port stability analysis techniques with respect to multi-stage RF amplifier design. The primary focus will be to investigate and develop network analysis techniques that allow internal ports to be created within a RF circuit. This technique will facilitate the application of existing stability analysis techniques in ways that are not commonly known. Examples of situations where traditional network and stability analysis is insufficient will be presented, and the application of the newly developed techniques will be examined.

Lin Pui-Yu. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2001. / Includes bibliographical references (leaves 103-105). / Abstracts in English and Chinese. / Acknowledgement / Chapter Chapter 1 --- Introduction --- p.1 / Chapter Chapter 2 --- Nonlinear Phenomenon of Power Amplifier --- p.5 / Chapter 2.1. --- AM-AM and AM-PM Distortion --- p.5 / Chapter 2.2. --- Intermodulation Distortion --- p.7 / Chapter Chapter 3 --- Linearization Techniques --- p.10 / Chapter 3.1. --- Power Backoff --- p.11 / Chapter 3.2. --- Feedback --- p.12 / Chapter 3.3. --- Predistortion --- p.12 / Chapter 3.4. --- Feedforward --- p.14 / Chapter 3.5. --- Other Linearization Techniques --- p.15 / Chapter Chapter 4 --- Analysis of Feedforward Power Amplifier --- p.17 / Chapter 4.1. --- Feedforward Efficiency --- p.18 / Chapter 4.2. --- Design Criteria of the Auxiliary Amplifier --- p.20 / Chapter 4.3. --- Sensitivity Analysis --- p.21 / Chapter 4.3.1. --- Phase and Amplitude Mismatch --- p.22 / Chapter 4.3.2. --- Delay Mismatch --- p.23 / Chapter 4.3.3. --- Combined Effect --- p.25 / Chapter 4.3.4. --- Practical Consideration --- p.27 / Chapter 4.4. --- Other Design Criteria --- p.28 / Chapter Chapter 5 --- Adaptive Control Networks for FFPA --- p.29 / Chapter 5.1. --- Basic Principles of the Adaptive Control Network --- p.30 / Chapter 5.1.1. --- Lookup Table --- p.30 / Chapter 5.1.2. --- Power Minimization Vs. Correlation --- p.31 / Chapter 5.2. --- Analog Vs Digital Implementation of the Adaptive Control Network --- p.34 / Chapter 5.3. --- Techniques for Improving the Convergence Behaviour at the Distortion Cancellation Loop --- p.35 / Chapter 5.4. --- Important Notes on the Control Networks --- p.38 / Chapter Chapter 6 --- Novel Analysis of Adaptive FFPA --- p.40 / Chapter 6.1. --- Gradient algorithm --- p.40 / Chapter 6.2. --- Dual Loop Adaptive FFPA --- p.41 / Chapter 6.2.1. --- System Modeling --- p.42 / Chapter 6.2.2. --- Adaptation Behavior of the Distortion Extraction Loop --- p.44 / Chapter 6.2.3. --- Adaptation Behavior of the Distortion Cancellation Loop --- p.48 / Chapter 6.2.4. --- Accuracy Requirement of the Control Signals --- p.50 / Chapter 6.2.5. --- Effect of Delay Mismatch on the Convergence Accuracy --- p.51 / Chapter 6.2.6. --- Convergence Behaviors for Two Tone Input Signal --- p.52 / Chapter 6.2.6.1. --- Distortion Extraction Loop --- p.53 / Chapter 6.2.6.2. --- Distortion Cancellation Loop --- p.55 / Chapter 6.2.6.3. --- Simulation Results --- p.57 / Chapter 6.2.7. --- Convergence Behaviors for Digital Modulated Test signal --- p.60 / Chapter 6.2.7.1. --- Distortion Extraction Loop --- p.61 / Chapter 6.2.7.2. --- Distortion Cancellation Loop --- p.66 / Chapter 6.2.7.3. --- Simulation Results --- p.68 / Chapter 6.2.8. --- Comparison for the Adaptation Performance with Two Tone and Digital Modulated Test Signal --- p.70 / Chapter 6.3. --- Triple Loop Adaptive FFPA --- p.71 / Chapter 6.3.1. --- Adaptation Performance of the Additional Loop --- p.73 / Chapter 6.3.2. --- Adaptation Performance of the Distortion Cancellation Loop --- p.75 / Chapter 6.3.3. --- Improvement in Bias Error at the Distortion Cancellation Loop --- p.76 / Chapter 6.3.4. --- Effect of Delay Mismatch --- p.77 / Chapter 6.3.5. --- Simulation Results --- p.79 / Chapter Chapter 7 --- Implementation and Measured Performance of Triple Loop Adaptive FFPA --- p.85 / Chapter 7.1. --- Hardware Design --- p.85 / Chapter 7.1.1. --- Vector Modulator --- p.87 / Chapter 7.1.2 --- Complex Correlator --- p.88 / Chapter 7.2. --- Experimental Setup and Measured Results --- p.90 / Chapter Chapter 8 --- Conclusion --- p.95 / Appendix I Matlab Program for Simulation of Dual Loop Adaptive FFPA --- p.97 / Appendix II Matlab Program for Simulation of Triple Loop Adaptive FFPA --- p.100 / Reference --- p.103 / Author's Publication --- p.106

米勒補償是現今最被廣泛使用的頻率補償方法之一。其極點分離現象為雙級放大器供簡易而又可靠的穏定作用。可是，隨着亞微米 CMOS 技術及低電壓電路設計的興起，高增益同時又寬頻寬的放大器設計變得愈來愈困難。雖然多階段方式能實現高增益的放大器規格，但其頻寬會隨之縮窄，頻率補償亦會變得複雜及困難。 / 在過去，很多學術硏究報告都提出了不少方法去解決多階段放大器頻寬縮窄的問題，但這些方法往往離開複雜的頻率補償技巧及電路結構。為了根本性地解決此問題，本論文會提出一個虛擬雙階段放大器的設計。此放大器設計利用了兩個低增益階段來放大進入第二階段前的訊號振幅，從而放進整個放大器的頻寬及增益。由於其簡單的結構，這個設計仍然能夠採用穏定可靠的簡易米勒補償方式來穏定整個放大器。 / 這個設計由CMOS 180nm（互補式屬-氧化層-半導體180納米）技術製成。實驗結果證實了其高增益及寬頻寬的效能。另外，這果放大器亦同時應用在一個低通濾波器的實現上，用以證明其實際應用上的用途。實驗結果證實利用該放大器實現的低通濾波器比用一般雙段放大器的功率消耗減少近 45%。 / Miller compensation is one of the most widely adopted frequency compensation techniques for two-stage amplifier design. With its pole-splitting behavior achieved by connecting a capacitor between the output nodes of the two gain stages, Miller compensation provides a simple and reliable stabilizing function to two stage amplifiers. However, with the advance of sub-micron CMOS technology and low-voltage circuit designs, high-gain and wide-bandwidth amplifier design becomes more difficult. Although multi-stage amplifiers can be used to attain high-gain specification, the bandwidth will be degraded dramatically and the frequency compensation scheme becomes much more complicated. / To solve the problem, several researches have been done to improve the frequency response of multi-stage amplifiers so as to achieve high-gain and wide-bandwidth specifications simultaneously. However, these always result in the increase of circuit complexity and more complicated frequency compensation techniques. / In this thesis, a virtual two-stage Miller compensated amplifier will be proposed. By using two small gain stages, the characteristics of a conventional two-stage Miller compensated amplifier can be retained due to the low output impedance of the two gain stages. The small gain stages boost the input signal amplitude of the second stage such that the generated small-signal output current can be increased significantly. This results in wider signal bandwidth and higher voltage gain. / The proposed design has been fabricated in UMC CMOS 0.18μm technology. Experimental results have verified the concept. From the measurement, the unity-gain frequency of the proposed design is better than the conventional design by 4 times. Moreover, the voltage gain is improved by about 20dB. The current consumption is 124.76μA which is the nearly the same as the conventional design. / In order to show the improvement in real applications, the proposed amplifier has been applied to a fifth-order low-pass filter with corner frequency of 50kHz. Under the same performance, the power consumption of the filter using the proposed amplifier can be reduced by about 45%. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Poon, Hiu Ching. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2012. / Includes bibliographical references. / Abstracts also in Chinese. / Abstract --- p.i / Acknowledgments --- p.iv / Table of Content --- p.v / List of Figures --- p.vii / List of Tables --- p.xi / Symbols Declarations --- p.xii / Chapter Chapter 1 --- Background Information / Chapter 1.1 --- High-Gain Amplifier and its Application with Negative Feedback Configuration --- p.1-1 / Chapter 1.2 --- High-Gain Amplifier Design and the Tradeoffs --- p.1-6 / Chapter 1.3 --- High-Gain Amplifier Implementations --- p.1-8 / Chapter 1.4 --- Contribution and Outlines of the Thesis --- p.1-15 / References --- p.1-16 / Chapter Chapter 2 --- Analysis of Frequency Compensation Techniques / Chapter 2.1 --- Simple Miller Compensation --- p.2-1 / Chapter 2.2 --- Miller Compensation with Null Resistor --- p.2-10 / Chapter 2.3 --- Miller Compensation with Multipath Zero Cancellation --- p.2-13 / Chapter 2.4 --- Nested Miller Compensation --- p.2-15 / Chapter 2.5 --- Advanced Frequency Compensation Techniques --- p.2-17 / Chapter 2.6 --- Conclusion of Chapter --- p.2-20 / References --- p.2-22 / Chapter Chapter 3 --- Proposed Amplifier Design / Chapter 3.1 --- Gain Tolerance --- p.3-1 / Chapter 3.2 --- Adjustments on Simple Miller Compensated Two-Stage Amplifier --- p.3-3 / Chapter 3.3 --- Introducing the Small Gain Stage --- p.3-4 / Chapter 3.4 --- Concept of the Proposed Virtual Two-Stage Miller Compensated Amplifier --- p.3-7 / Chapter 3.5 --- Comparisons with Bandwidth Enhanced Miller Compensated Two-Stage Amplifier --- p.3-9 / Chapter 3.6 --- Proposed Virtual Two-Stage Amplifier with Simple Miller Compensation --- p.3-13 / Chapter 3.7 --- Design Considerations and Expected Performance --- p.3-15 / Chapter 3.8 --- Experimental Result --- p.3-18 / Chapter 3.9 --- Conclusions of Chapter --- p.3-31 / References --- p.3-32 / Chapter Chapter 4 --- Implementation of the Low-Pass Filter / Chapter 4.1 --- Implementation of the Low-Pass Filter --- p.4-1 / Chapter 4.2 --- Experimental Result --- p.4-4 / Chapter 4.3 --- Conclusion of Chapter --- p.4-7 / Reference --- p.4-8 / Chapter Chapter 5 --- Conclusion and Future Work / Chapter 5.1 --- Conclusion of Thesis --- p.5-1 / Chapter 5.2 --- Suggestion for Future Work --- p.5-2