Multi-core computing is becoming ubiquitous due to the scaling limitations of single-core computing. It is inevitable that parallel programming will become the mainstream for such processors. In this paradigm shift, the concept of abstraction should not be compromised. A programming model serves as an abstraction of how programs are executed. Transactional Memory (TM) is a technique proposed to maintain lock free synchronization. Due to the simplicity of the abstraction provided by it, TM can also be used as a way of distributing parallel work, maintaining coherence and consistency. Motivated by this, at a higher level, the thesis makes three contributions and all are centred around Hardware Transactional Memory (HTM).As the first contribution, a transaction-only architecture is coupled with a ``data centric" approach, to address the scalability issues of the former whilst maintaining its simplicity. This is achieved by grouping together memory locations having similar access patterns and maintaining coherence and consistency according to the group each memory location belongs to. As the second contribution a novel technique is proposed to reduce the number of false transaction aborts which occur in a signature based HTM. The idea is to adaptively switch between cache lines and signatures to detect conflicts. That is, when a transaction fits in the L1 cache, cache line information is used to detect conflicts and signatures are used otherwise. As the third contribution, the thesis makes a case for having an exit functionality in an HTM. The objective of the proposed functionality, TM_EXIT, is to terminate a transaction without restarting or committing.

Dans le contexte de la vision par ordinateur, le choix d’une architecture de calcul est devenu de plus en plus complexe pour un spécialiste du traitement d’images. Le nombre d’architectures permettant de résoudre des algorithmes de traitement d’images augmente d’année en année. Ces algorithmes s’intègrent dans des cadres eux-mêmes de plus en plus complexes répondant à de multiples contraintes, que ce soit en terme de capacité de calculs, mais aussi en terme de consommation ou d’encombrement. A ces contraintes s’ajoute le nombre grandissant de types d’architectures de calculs pouvant répondre aux besoins d’une application (CPU, GPU, FPGA). L’enjeu principal de l’étude est la prédiction de la performance d’un système, cette prédiction pouvant être réalisée en phase amont d’un projet de développement dans le domaine de la vision. Dans un cadre de développement, industriel ou de recherche, l’impact en termes de réduction des coûts de développement, est d’autant plus important que le choix de l’architecture de calcul est réalisé tôt. De nombreux outils et méthodes d’évaluation de la performance ont été développés mais ceux-ci, se concentrent rarement sur un domaine précis et ne permettent pas d’évaluer la performance sans une étude complète du code ou sans la réalisation de tests sur l’architecture étudiée. Notre but étant de s’affranchir totalement de benchmark, nous nous sommes concentrés sur le domaine du traitement d’images pour pouvoir décomposer les algorithmes du domaine en éléments simples ici nommées briques élémentaires. Dans cette optique, un nouveau paradigme qui repose sur une décomposition de tout algorithme de traitement d’images en ces briques élémentaires a été conçu. Une méthode est proposée pour modéliser ces briques en fonction de paramètres software et hardwares. L’étude démontre que la décomposition en briques élémentaires est réalisable et que ces briques élémentaires peuvent être modélisées. Les premiers tests sur différentes architectures avec des données réelles et des algorithmes comme la convolution et les ondelettes ont permis de valider l'approche. Ce paradigme est un premier pas vers la réalisation d’un outil qui permettra de proposer des architectures pour le traitement d’images et d’aider à l’optimisation d’un programme dans ce domaine. / In computer vision, the choice of a computing architecture is becoming more difficult for image processing experts. Indeed, the number of architectures allowing the computation of image processing algorithms is increasing. Moreover, the number of computer vision applications constrained by computing capacity, power consumption and size is increasing. Furthermore, selecting an hardware architecture, as CPU, GPU or FPGA is also an important issue when considering computer vision applications.The main goal of this study is to predict the system performance in the beginning of a computer vision project. Indeed, for a manufacturer or even a researcher, selecting the computing architecture should be done as soon as possible to minimize the impact on development.A large variety of methods and tools has been developed to predict the performance of computing systems. However, they do not cover a specific area and they cannot predict the performance without analyzing the code or making some benchmarks on architectures. In this works, we specially focus on the prediction of the performance of computer vision algorithms without the need for benchmarking. This allows splitting the image processing algorithms in primitive blocks.In this context, a new paradigm based on splitting every image processing algorithms in primitive blocks has been developed. Furthermore, we propose a method to model the primitive blocks according to the software and hardware parameters. The decomposition in primitive blocks and their modeling was demonstrated to be possible. Herein, the performed experiences, on different architectures, with real data, using algorithms as convolution and wavelets validated the proposed paradigm. This approach is a first step towards the development of a tool allowing to help choosing hardware architecture and optimizing image processing algorithms.

Submitted by Viviane Lima da Cunha (viviane@biblioteca.ufpb.br) on 2016-02-16T14:54:49Z No. of bitstreams: 1 arquivovotal.pdf: 4473573 bytes, checksum: 152c2f0d263c50dcbea7d500d5f7f5da (MD5) / Made available in DSpace on 2016-02-16T14:54:49Z (GMT). No. of bitstreams: 1 arquivovotal.pdf: 4473573 bytes, checksum: 152c2f0d263c50dcbea7d500d5f7f5da (MD5) Previous issue date: 2015-08-17 / Este trabalho propõe um ambiente para verificação de sistemas embarcados heterogêneos através da cossimulação distribuída. A verificação ocorre de maneira síncrona entre o software do sistema e o sistema embarcado usando a High Level Architecture (HLA) como middeware. A novidade desta abordagem não é apenas fornecer suporte para simulações, mas também permitir a integração sincronizada com todos os dispositivos de hardware físico. Neste trabalho foi utilizado o Ptolemy como uma plataforma de simulação. A integração do HLA com Ptolemy e os modelos de hardware abre um vasto conjunto de aplicações, como o de teste de vários dispositivos ao mesmo tempo, executando os mesmos, ou diferentes aplicativos ou módulos, a execução de multiplos dispositivos embarcados para a melhoria de performance. Além disso a abordagem de utilização do HLA, permite que sejam interligados ao ambiente, qualquer tipo de robô, assim como qualquer outro simulador diferente do Ptolemy. Estudo de casos são apresentado para provar o conceito, mostrando a integração bem sucedida entre o Ptolemy e o HLA e a verificação de sistemas utilizando Hardware-in-the-loop e Robot-in-the-loop. / This work proposes an environment for verification of heterogeneous embedded systems through distributed co-simulation. The verification occurs in real-time co-simulating the system software and hardware platform using the High Level Architecture (HLA) as a middleware. The novelty of this approach is not only providing support for simulations, but also allowing the synchronous integration with any physical hardware devices. In this work we use the Ptolemy framework as a simulation platform. The integration of HLA with Ptolemy and the hardware models open a vast set of applications, like the test of many devices at the same time, running the same, or different applications or modules, the usage of Ptolemy for real-time control of embedded systems and the distributed execution of different embedded devices for performance improvement. Furthermore the use of HLA approach allows them to be connected to the environment, any type of robot, as well as any other Ptolemy simulations. Case studies are presented to prove the concept, showing the successful integration between Ptolemy and the HLA and verification systems using Hardware-in-the-loop and Robot-in-the-loop.

Recentemente, um crescente número de institutos de pesquisa pelo mundo tem focado seus estudos em veículos aéreos não tripulados (VANT ou, em inglês, UAV - Unmanned Aerial Vehicle), que se revelam muito úteis tanto em aplicações militares quanto civis, pois suas principais vantagens são: a alta confiabilidade, baixo risco à vida, reduzido custo de implantação e manutenção. A pesquisa apresentada neste trabalho integra-se ao projeto BR-UAV em desenvolvimento na empresa Xmobots Sistemas Robóticos LTDA e no Laboratório de Veículos Não Tripulados (LVNT) da Escola Politécnica da USP. O projeto BR-UAV visa a contribuir para a inserção desta tecnologia no país e, para tanto, desenvolve atualmente a plataforma, aviônica e sistema de controle autônomo voltados ao objetivo de monitoramento no espectro visível e infravermelho. O principal requisito do projeto BR-UAV é o desenvolvimento de um sistema aéreo não tripulado capaz de voar dentro do espaço aéreo controlado. Esta pesquisa foca no desenvolvimento do software embarcado, assim este software deve ser desenvolvido de acordo com uma metodologia direcionada a homologação. Por isso, este trabalho propõe uma metodologia que foi baseada em cinco elementos: processo de desenvolvimento, normas, ferramentas de sistema operacional, ferramentas de aplicação e ferramentas matemáticas. Após o estabelecimento dos objetivos, de uma análise do estado da arte em sistemas aviônicos, e da metodologia de certificação, o processo de desenvolvimento foi inicializado. Na fase de engenharia de sistemas, os requisitos de sistema foram capturados. Então a arquitetura de sistema (hardware e software) foi modelada e analisada. A partir desta modelagem de sistema, os requisitos funcionais e temporais de software puderam ser capturados na etapa de análise da fase de engenharia de software. Na etapa de Implementação, o interior dos agentes foi codificado.Além disso, foi implementado o filtro de Kalman estendido para integrar informações de GPS, unidade de medição inercial e bússola. Na etapa de Testes, foram realizados testes de integração funcional e de desempenho computacional. Os resultados demonstraram que o sistema atendeu a todos os requisitos consumindo 38.3% de processamento. Finalmente, os próximos passos desta pesquisa são discutidos. / Recently, an increasing number of research institutes around the world has been focusing their efforts in the study of unmanned aerial vehicles (UAV), which have proved to be very useful both in military and civil applications because of their major advantages: high reliability, reduced risk to life, reduced maintenance and implantation costs. The research presented in this work is part of the BR-UAV project, which is in development at XMobots Sistemas Robóticos LTDA and at the Laboratório de Veículos Não Tripulados of USP (Brazil). This project aims to contribute for the insertion of this technology in Brazil. Particularly, at the present stage, the project includes the development of the platform, avionics and autonomous control system for environment monitoring via visible and infrared spectrums. The main requirement of BR-UAV Project is the development of an unmanned aerial system that could flight in controlled airspace. This research is focused on the development of embedded software, and therefore this software should be developed according to a certification methodology. For this purpose, this work proposes a methodology that was based into five guidelines: development process, norms, operating system tools, application tools and mathematical tools. The development process was started after the statement of objectives and the analysis of the state of art on UAV avionics. In the systems engineering phase, system requirements were captured and then the system architecture (hardware and software) was modeled and analyzed. From the system modeling, the functional and temporal software requirements could be captured in the analysis stage of the software engineering phase. In the Implementation stage, the agents were coded as well as the Extended Kalman Filter for integrating information from GPS, inertial measurement unit and Compass sensors. In the Tests stage, integration tests were performed.The results showed that the system could fulfill requirements using 38.3% of processing consumption. Finally, the next steps of this research are discussed.

Recentemente, um crescente número de institutos de pesquisa pelo mundo tem focado seus estudos em veículos aéreos não tripulados (VANT ou, em inglês, UAV - Unmanned Aerial Vehicle), que se revelam muito úteis tanto em aplicações militares quanto civis, pois suas principais vantagens são: a alta confiabilidade, baixo risco à vida, reduzido custo de implantação e manutenção. A pesquisa apresentada neste trabalho integra-se ao projeto BR-UAV em desenvolvimento na empresa Xmobots Sistemas Robóticos LTDA e no Laboratório de Veículos Não Tripulados (LVNT) da Escola Politécnica da USP. O projeto BR-UAV visa a contribuir para a inserção desta tecnologia no país e, para tanto, desenvolve atualmente a plataforma, aviônica e sistema de controle autônomo voltados ao objetivo de monitoramento no espectro visível e infravermelho. O principal requisito do projeto BR-UAV é o desenvolvimento de um sistema aéreo não tripulado capaz de voar dentro do espaço aéreo controlado. Esta pesquisa foca no desenvolvimento do software embarcado, assim este software deve ser desenvolvido de acordo com uma metodologia direcionada a homologação. Por isso, este trabalho propõe uma metodologia que foi baseada em cinco elementos: processo de desenvolvimento, normas, ferramentas de sistema operacional, ferramentas de aplicação e ferramentas matemáticas. Após o estabelecimento dos objetivos, de uma análise do estado da arte em sistemas aviônicos, e da metodologia de certificação, o processo de desenvolvimento foi inicializado. Na fase de engenharia de sistemas, os requisitos de sistema foram capturados. Então a arquitetura de sistema (hardware e software) foi modelada e analisada. A partir desta modelagem de sistema, os requisitos funcionais e temporais de software puderam ser capturados na etapa de análise da fase de engenharia de software. Na etapa de Implementação, o interior dos agentes foi codificado.Além disso, foi implementado o filtro de Kalman estendido para integrar informações de GPS, unidade de medição inercial e bússola. Na etapa de Testes, foram realizados testes de integração funcional e de desempenho computacional. Os resultados demonstraram que o sistema atendeu a todos os requisitos consumindo 38.3% de processamento. Finalmente, os próximos passos desta pesquisa são discutidos. / Recently, an increasing number of research institutes around the world has been focusing their efforts in the study of unmanned aerial vehicles (UAV), which have proved to be very useful both in military and civil applications because of their major advantages: high reliability, reduced risk to life, reduced maintenance and implantation costs. The research presented in this work is part of the BR-UAV project, which is in development at XMobots Sistemas Robóticos LTDA and at the Laboratório de Veículos Não Tripulados of USP (Brazil). This project aims to contribute for the insertion of this technology in Brazil. Particularly, at the present stage, the project includes the development of the platform, avionics and autonomous control system for environment monitoring via visible and infrared spectrums. The main requirement of BR-UAV Project is the development of an unmanned aerial system that could flight in controlled airspace. This research is focused on the development of embedded software, and therefore this software should be developed according to a certification methodology. For this purpose, this work proposes a methodology that was based into five guidelines: development process, norms, operating system tools, application tools and mathematical tools. The development process was started after the statement of objectives and the analysis of the state of art on UAV avionics. In the systems engineering phase, system requirements were captured and then the system architecture (hardware and software) was modeled and analyzed. From the system modeling, the functional and temporal software requirements could be captured in the analysis stage of the software engineering phase. In the Implementation stage, the agents were coded as well as the Extended Kalman Filter for integrating information from GPS, inertial measurement unit and Compass sensors. In the Tests stage, integration tests were performed.The results showed that the system could fulfill requirements using 38.3% of processing consumption. Finally, the next steps of this research are discussed.

The increasing heterogeneity in hardware systems gives developers many opportunities to add more functionality and computational power to the system. As a consequence, modern database systems will need to be able to adapt to a wide variety of heterogeneous architectures. While porting single operators to accelerator architectures is well-understood, a more generic approach is needed for the whole database system. In prior work, we presented a generic hardware-oblivious database system, where the operators can be executed on the main processor as well as on a large number of accelerator architectures. However, to achieve fully heterogeneous query processing, placement decisions are needed for the database operators. We enhance the presented system with heterogeneity-aware operator placement (HOP) to take a major step towards designing a database system that can efficiently exploit highly heterogeneous hardware environments. In this demonstration, we are focusing on the placement-integration aspect as well as presenting the resulting database system.