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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Design and Implementation of FlexRay Automotive Communication System Physical Layer and 32-bit High Speed Tree-Structured Carry Lookahead Adder

Juan, Chun-Ying 24 July 2008 (has links)
This thesis comprises two parts : the first one is the design and implementation of FlexRay automotive communication system physical layer; the second part is the design of a high speed pipelined tree-structured carry lookahead adder (CLA). The first part of this thesis is to introduce the physical layer specification of FlexRay automotive communication system. Then, it is realized in an SOC by a typical 0.18 um CMOS process. The second topic is to propose a novel CANT logic. By the CANT logic, a pipelined tree-structured carry lookahead adder is designed and implemented. The dynamic bulk biasing technique is utilized to increase the switching speed of inverting circuits such that the delays of the inverting and non-inverting circuit is very close. The proposed architecture can be easily expanded to long data words CLA. Post-layout simulations reveal that the 32-bit CLA using the proposed CANT logic can operate up to 7.2 GHz by using the UMC 90 nm process.
2

FlexRay Automotive Communication System Physical Layer Chip Design and A High Efficiency DC/DC Buck Converter with Sub-3 ¡Ñ VDD

Wang, Ching-lin 01 July 2009 (has links)
This thesis comprises two topics : the first one is the design and implementation of FlexRay automotive communication system physical layer. The second part is the design of a high efficiency DC/DC Buck converter with sub-3 ¡Ñ VDD. The first topic discloses the physical layer design comprising the Bus Guardian and the Bus Driver used in an in-vehicle network compliant with FlexRay standards. It is realized in a mixed-signal chip using TSMC 1P6M 0.18 £gm CMOS process. Its core area is less than 0.8 mm2, and power consumption is less than 60 mW. The second topic is to design a DC to DC step-down converter, which can accommodate wide range VDD. By utilizing stacked power MOSFETs, a voltage level converter, a detector and a controller, the design is realized by a typical 1P6M 0.18 £gm CMOS process without any high voltage technology. The core area is less than 0.184 mm2, while the VDD range is up to 5 V. Since the internal reference voltage is 1 V, it can increase the output regulation range. The proposed design attains very high conversion efficiency to prolong the life time of power supply. Therefore, it can be integrated in a system chip to provide multiple supply voltage sources.

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