In this paper, we propose a high-yield self-aligned process to form a silicon-on-insulator MOSFET with block oxide for 1T DRAM use. The new process can overcome the problem of the previous one [1], which cannot be used for a thin BOX devices. Based on the TCAD 10.0 simulation, we compared the conventional 1T-DRAM (PDSOI) with the partially depleted SOI with block oxide ¡]bPDSOI¡^ which used the new process presented in this thesis, We find that the device with block oxide embedded on body is not only obtain good short-channel effects immunity but also reduce leakage of the P-N junction between source/drain and the body and increase the gate controlability on the channel region. Moreover, it can decrease power consumption and raise the operation speed of the 1T-DRAM. Compare to the PDSOI DRAM to carry out 10 £gA programming window, the power consumption of the new 1T-DRAM is diminished 39% of write ¡§1¡¨ and 25% of write ¡§0¡¨. Furthermore, the energy consumption during memory operation is only 23% compared to that of the conventional PDSOI DRAM and it can short the operation time but achieve a long retention time.