In this thesis, a bottom gate TFT with smart body tie device is realized, For a PDSOI devices, which usually uses large layout areas of body ties, and it has self-heating effect resulting from the buried oxide between the silicon film and substrate, which has a lower thermal conductivity. In order to suppress the short channel effect and reduce leakage current, we dug out in advance the PN junction to formed the ultra thin film body, besides, in order to reduce Miller's capacitance effect we formed enough thickness of spacer at both sides of the bottom gate and let the source and the drain region do not too closer nearly. According to the simulation results of ISE TCAD, the TFT with smart body tie device can alleviate self-heating effect and can achieve kink-free at output characteristic curve due to hot carriers by impact ionization and enhance the breakdown voltage of the device. Although the drive current of the TFT device lower than conventional TFT due to the parasitic resistance in the body region, the output characteristic curve is smooth in the saturation zone; the device suppress the short channel effect and improve the performance of the device due to most areas of PN junction are dug out.

Nanocrystalline silicon (nc-Si:H) is a promising material for Thin-Film Transistors (TFTs) offering potentially higher mobilities and improved stability over hydrogenated amorphous silicon (a-Si:H). The slow growth rate of nc-Si:H can be overcome by using pulsed Plasma-Enhanced Chemical Vapour Deposition (PECVD). Pulsed PECVD also reduces powder particle formation in the plasma and provides added degrees of freedom for process optimization. Unlike high frequency PECVD, pulsed PECVD can be scaled to deposit films over large areas with no reduction in performance. For this thesis, silicon thin films were deposited by the pulsed PECVD technique at a temperature of 150 ??C and TFTs were made using this material. Radio Frequency (RF) power and silane (SiH₄) flow rate were varied in order to study the effect of different levels of crystallinity on the film. Raman spectroscopy, Atomic Force Microscope (AFM), X-Ray Diffraction (XRD), electrical conductivity, Hall mobility, optical band gap, and stability under light-soaking were measured using films of two different thicknesses, 50 nm and 300 nm. From the Raman data we see that the 50 nm films deposited with high hydrogen dilution are mostly amorphous, indicating the presence of a thick incubation layer. The 300nm samples deposited with hydrogen dilution, on the other hand, showed very high crystallinity and conductivity, except for 300-2 which was surprisingly, mostly amorphous. AFM and XRD measurements were also performed to confirm the Raman data and get an estimate for the crystallite grain size in the 300 nm samples. The conductivity was measured for all films, and the Hall mobility and carrier concentration was measured for one of the 300 nm films. The thin samples which are mostly amorphous show low conductivity whereas the thick high crystallinity films show high conductivity, and n-type behaviour possibly due to oxygen doping. The optical gap was also measured using Ultra Violet (UV) light and results indicate the possible presence of small crystallites in the 50 nm films. The conductivity's stability under light-soaking was measured to observe the material's susceptibility to degradation, and the 300 nm with high crystallinity were much more stable than the a-Si:H films. All the results of these measurements varied depending on the film and these results are discussed. Bottom-gate TFTs were fabricated using a pulsed PECVD channel layer and an amorphous silicon nitride (a-SiN:H) gate dielectric. The extracted parameters of one of the best TFTs are <i>&mu;_sat</i> &le; 0. 38 cm² V^-1 s^-1, <i>V_t,sat</i> &ge; 7. 3 V, <i>I_on/off</i> > 10⁶, and <i>S</i> < 1 V/decade. These parameters were extracted semi-automatically from the basic Field-Effect Transistor (FET) model using a computer program. Extraction using a more complicated model yielded similar results for mobility and threshold voltage but also gave a large power parameter <i>&alpha;</i> of 2. 31 and conduction band tail slope of 30 meV. The TFT performance and material properties are presented and discussed. On this first attempt at fabricating TFTs using a nc-Si:H channel layer deposited by pulsed PECVD, results were obtained which are consistent with results for low temperature a-Si:H TFTs and previous pulsed PECVD TFTs. The channel layer was mostly amorphous and non-crystalline, possibly due to the amorphous substrate or insufficient hydrogen dilution in the plasma. The 300 nm films showed, however, that high crystallinity material deposited directly on glass can easily be obtained, and this material showed less degradation under light-soaking than the purely amorphous counterpart. Pulsed PECVD is a promising technique for the growth of nc-Si:H and with further materials development and process optimization for TFTs, it may prove to be useful for the growth of high-quality nc-Si:H TFT channel layers.

Nanocrystalline silicon (nc-Si:H) is a promising material for Thin-Film Transistors (TFTs) offering potentially higher mobilities and improved stability over hydrogenated amorphous silicon (a-Si:H). The slow growth rate of nc-Si:H can be overcome by using pulsed Plasma-Enhanced Chemical Vapour Deposition (PECVD). Pulsed PECVD also reduces powder particle formation in the plasma and provides added degrees of freedom for process optimization. Unlike high frequency PECVD, pulsed PECVD can be scaled to deposit films over large areas with no reduction in performance. For this thesis, silicon thin films were deposited by the pulsed PECVD technique at a temperature of 150 °C and TFTs were made using this material. Radio Frequency (RF) power and silane (SiH₄) flow rate were varied in order to study the effect of different levels of crystallinity on the film. Raman spectroscopy, Atomic Force Microscope (AFM), X-Ray Diffraction (XRD), electrical conductivity, Hall mobility, optical band gap, and stability under light-soaking were measured using films of two different thicknesses, 50 nm and 300 nm. From the Raman data we see that the 50 nm films deposited with high hydrogen dilution are mostly amorphous, indicating the presence of a thick incubation layer. The 300nm samples deposited with hydrogen dilution, on the other hand, showed very high crystallinity and conductivity, except for 300-2 which was surprisingly, mostly amorphous. AFM and XRD measurements were also performed to confirm the Raman data and get an estimate for the crystallite grain size in the 300 nm samples. The conductivity was measured for all films, and the Hall mobility and carrier concentration was measured for one of the 300 nm films. The thin samples which are mostly amorphous show low conductivity whereas the thick high crystallinity films show high conductivity, and n-type behaviour possibly due to oxygen doping. The optical gap was also measured using Ultra Violet (UV) light and results indicate the possible presence of small crystallites in the 50 nm films. The conductivity's stability under light-soaking was measured to observe the material's susceptibility to degradation, and the 300 nm with high crystallinity were much more stable than the a-Si:H films. All the results of these measurements varied depending on the film and these results are discussed. Bottom-gate TFTs were fabricated using a pulsed PECVD channel layer and an amorphous silicon nitride (a-SiN:H) gate dielectric. The extracted parameters of one of the best TFTs are <i>&mu;_sat</i> &le; 0. 38 cm² V^-1 s^-1, <i>V_t,sat</i> &ge; 7. 3 V, <i>I_on/off</i> > 10⁶, and <i>S</i> < 1 V/decade. These parameters were extracted semi-automatically from the basic Field-Effect Transistor (FET) model using a computer program. Extraction using a more complicated model yielded similar results for mobility and threshold voltage but also gave a large power parameter <i>&alpha;</i> of 2. 31 and conduction band tail slope of 30 meV. The TFT performance and material properties are presented and discussed. On this first attempt at fabricating TFTs using a nc-Si:H channel layer deposited by pulsed PECVD, results were obtained which are consistent with results for low temperature a-Si:H TFTs and previous pulsed PECVD TFTs. The channel layer was mostly amorphous and non-crystalline, possibly due to the amorphous substrate or insufficient hydrogen dilution in the plasma. The 300 nm films showed, however, that high crystallinity material deposited directly on glass can easily be obtained, and this material showed less degradation under light-soaking than the purely amorphous counterpart. Pulsed PECVD is a promising technique for the growth of nc-Si:H and with further materials development and process optimization for TFTs, it may prove to be useful for the growth of high-quality nc-Si:H TFT channel layers.