IDDQ testing is one of the most effective methods for detecting defects in integrated circuits. Higher leakage currents in more advanced semiconductor technologies have reduced the resolution of IDDQ test. One solution is to use built-in current sensors. Several sensor techniques for measuring the current based on the magnetic field or voltage drop across the supply line have been proposed. In this work, we develop a behavioral model for a built-in current sensor measuring voltage drop and use this model to better understand sensor operation, identify the effect of different parameters on sensor resolution, and suggest design modifications to improve future sensor performance.

En esta tesis se propone un método de diseño para test orientado hacia circuitos mixtos empotrados. El método de test está basado en el análisis del consumo de corriente dinámica (IDDX) tanto estacionaria como transitoria.Con objeto de procesar adecuadamente la información de los transitorios de corriente, la medida se efectúa internamente integrando dentro del chip un bloque sensor de corriente (BICS) junto al circuito bajo test (CUT). Se ha desarrollado una estructura del módulo sensor para otorgar más peso específico al muestreo de las componentes de alta frecuencia de la corriente.El método de test estructural propuesto busca disminuir el tiempo necesario para realizar el test y reducir la complejidad de los equipos de medida comúnmente utilizados en el test analógico. Por ello, el circuito sensor de corriente realiza un procesado de la información para proporcionar una firma digital que codifica el funcionamiento del circuito. La tesis también extiende la propuesta de test a circuitos de capacidades conmutadas (SC) utilizando un circuito sensor de carga integrado junto al circuito bajo test. / This thesis describes a design-for-test method for embedded mixed signal circuits. It is based on the analysis of the dynamic current consumption (IDDX), both quiescent and transient.In order to correctly process the information contained in the transient current, the measurement is performed by a built-in current sensor circuit (BICS) integrated within the circuit under test (CUT). A structure for the sensor block has been developed to give more specific weight to the high-frequency components of the current.The proposed structural test method aims to reduce the test time and the complexity of the measurement equipment commonly used in analog tests. Therefore, the current sensor performs internal data processing to provide a digital signature that encodes the circuit behaviour.The thesis also extends the test method to switched capacitor circuits (SC) using a charge sensor circuit integrated within the circuit under test.