The scaling of VLSI technology has spurred a rapid growth in the semiconductor industry. With the CMOS device dimension scaling to and beyond 90nm technology, it is possible to achieve higher performance and to pack more complex functionalities on a single chip. However, the scaling trend has introduced drastic variation of process and design parameters, leading to severe variability of chip performance in nanometer regime. Also, the manufacturing community projects CMOS will scale for three to four more generations. Since the uncertainties due to variations are expected to increase in each generation, it will significantly impact the performance of design and consequently the yield. Another challenging issue in the nanometer IC design is the high power consumption due to the greater packing density, higher frequency of operation and excessive leakage power. Moreover, the circuits are usually over-designed to compensate for uncertainties due to variations. The over-designed circuits not only make timing closure difficult but also cause excessive power consumption. For portable electronics, excessive power consumption may reduce battery life; for non-portable systems it may impose great difficulties in cooling and packaging. The objective of my research has been to develop design methodologies to address variations and power dissipation for reliable circuit operation. The proposed work has been divided into three parts: the first part addresses the issues related with power/ground noise induced by clock distribution network and proposes techniques to reduce power/ground noise considering the effects of process variations. The second part proposes an elastic pipeline scheme for random circuits with feedback loops. The proposed scheme provides a low-power solution that has the same variation tolerance as the conventional approaches. The third section deals with discrete buffer and wire sizing for link-based non-tree clock network, which is an energy efficient structure for skew tolerance to variations. For the power/ground noise problem, our approach could reduce the peak current and the delay variations by 50% and 51% respectively. Compared to conventional approach, the elastic timing scheme reduces power dissipation by 20% − 27%. The sizing method achieves clock skew reduction of 45% with a small increase in power dissipation.

Time synchronization in wireless sensor networks (WSNs) is essential and significant for maintaining data consistency, coordination, and performing other fundamental operations, such as power management, security, and localization. Energy efficiency is the main concern in designing time synchronization protocols for WSNs because of the limited and generally nonrechargeable power resources. In this dissertation, the problem of time synchronization is studied in three different aspects to achieve energy efficient time synchronization in WSNs. First, a family of novel joint clock offset and skew estimators, based on the classical two-way message exchange model, is developed for time synchronization in WSNs. The proposed joint clock offset and skew correction mechanisms significantly increase the period of time synchronization, which is a critical factor in the over-all energy consumption required for global network synchronization. Moreover, the Cramer-Rao bounds for the maximum likelihood estimators are derived under two different delay assumptions. These analytical metrics serve as good benchmarks for the experimental results thus far reported. Second, this dissertation proposes a new time synchronization protocol, called the Pairwise Broadcast Synchronization (PBS), which aims at minimizing the number of message transmissions and implicitly the energy consumption necessary for global synchronization of WSNs. A novel approach for time synchronization is adopted in PBS, where a group of sensor nodes are synchronized by only overhearing the timing messages of a pair of sensor nodes. PBS requires a far smaller number of timing messages than other well-known protocols and incurs no loss in synchronization accuracy. Moreover, for densely deployed WSNs, PBS presents significant energy saving. Finally, this dissertation introduces a novel adaptive time synchronization protocol, named the Adaptive Multi-hop Timing Synchronization (AMTS). According to the current network status, AMTS optimizes crucial network parameters considering the energy efficiency of time synchronization. AMTS exhibits significant benefits in terms of energy-efficiency, and can be applied to various types of sensor network applications having different requirements.

Clock mesh is widely used in microprocessor designs for achieving low clock skew and high process variation tolerance. Clock mesh optimization is a very diffcult problem to solve because it has a highly connected structure and requires accurate delay models which are computationally expensive. Existing methods on clock network optimization are either restricted to clock trees, which are easy to be separated into smaller problems, or naive heuristics based on crude delay models. A clock mesh sizing algorithm, which is aimed to minimize total mesh wire area with consideration of clock skew constraints, has been proposed in this research work. This algorithm is a systematic solution search through rigorous Sequential Quadratic Programming (SQP). The SQP is guided by an efficient adjoint sensitivity analysis which has near-SPICE(Simulation Program for Integrated Circuits Emphasis)-level accuracy and faster-than-SPICE speed. Experimental results on various benchmark circuits indicate that this algorithm leads to substantial wire area reduction while maintaining low clock skew in the clock mesh. The reduction in mesh area achieved is about 33%.

Chemoreception is a primitive sense universally employed by organisms for finding and selecting food, rejecting toxic chemicals, detecting mates and offspring, choosing sites for egg-laying, recognizing territories and avoiding predators. Chemosensory responses are frequently modulated based on the internal environment of the organism. An organism’s internal environment undergoes regular changes in anticipation and in response to daily changes in its external environment, e.g., light-dark cycle. A resettable timekeeping mechanism called the circadian clock internally drives these cyclical changes with a ~24 hour period. Using electrophysiological, behavioral and molecular analyses, I tested where and how these two conserved processes, viz., the circadian timekeeping mechanism and the chemosensory pathway, intersect each other at organismal and cellular levels. The presence of autonomous peripheral oscillators in the chemosensory organs of Drosophila, prompted us to test whether chemosensory responses are under control of the circadian clock. I found that local oscillators in afferent (primary) chemosensory neurons drive rhythms in physiological and behavioral responses to attractive and aversive chemical signals. During the middle of the night, high level of G proteincoupled receptor kinase 2 (GPRK2), a clock controlled signaling molecule present in chemosensory neurons, suppresses tastant-evoked responses and promotes olfactory responses. G-protein mediated signaling was shown to be involved in generating optimal response to odorants. Multifunctional chemosensory clocks exert control on feeding and metabolism. I propose that temporal plasticity in innate behaviors should offer adaptive advantages to flies.

Three different topics associated with their respective applications are proposed in this thesis. The first topic is the implementation of a transimpedence preamplifier for 16 Mbps infrared transceiver modules. The design of the preamplifier is aimed at the VFIR (very fast infrared) which is supposed to provide a 16 Mbps data transmission rate. The second topic is focused on the implementation of a robust reference clock generator design for DDR synchronous devices. A pulse generator circuit to generate pulses corresponding to the rise edges and fall edges of a given clock is presented. The third topic is to carry out a cost-effective voice dialer. It focuses on the voice feature extraction and the recognition of Chinese numbers 0 to 9. We present a low-cost method to implement such an algorithm by using 8051-ICE.

The study of the in vitro circadian oscillator of the cyanobacterium Synechococcus elongatus has uncovered a complex interplay of its three protein components. Synchronization of the clock's central oscillatory component, KaiC, has been thought to be achieved through subunit shuffling at specific intervals during the clock's period. By utilizing an established fluorescence-based analysis on completely phosphorylated and dephosphorylated mutants as well as wild-type KaiC, this study has shown that shuffling rates are largely unaffected by phosphorylation state. These findings conflict with previous reports and hence revise our understanding of this oscillator.

Study Objectives. Sleep is regulated by internal mechanisms that respond to environmental cues. Physical activity is one external cue that can affect sleep. It has been suggested that exercise affects sleep in a variety of ways, including influencing neurotransmitter levels and altering circadian rhythms. The purpose of this study was to examine self-reported sleep quality both before and after a well- defined exercise protocol. Design, Setting, and Participants. The TIGER study involves a 15-week aerobic exercise intervention conducted in young adults (n=2,027, mean age 21.8 ± 5 y). Participants were required to engage in 30 minutes of aerobic exercise at 65-85% maximal heart rate reserve three times/week. Multivariate regression was used to identify factors associated with sleep quality and duration. Measurements and Results. Multiple measures of body size/composition, heart rate (HR), and blood pressure (BP) were obtained on all participants. Sleep quality and duration were accessed via a condensed sleep quality profile (SQP). Prior to exercise, age (p<0.001), gender (p<0.008) and overweight/obesity status (p<0.001), but not race/ethnicity, were all significantly associated with SQP score. Age (p<0.002), and race/ethnicity (p<0.05) were significantly associated with sleep duration, with African Americans and Hispanics having significantly shorter sleep times compared to non-Hispanic whites. SQP score was not significantly different following chronic exercise training. Conclusions. Although overweight/obesity groups had significantly different sleep quality scores before and after exercise, sleep quality did not change for subjects after 15 weeks of aerobic exercise intervention. / text

A clock driver that works on the principle of charging and discharging the clock network in a VLSI circuit in two steps is investigated in a few different configurations. The aim of the design is twofold: to reduce the power consumption to reduce the third harmonic of the clock signal, and thereby the EMI (electromagnetic interference) emitted by the clock network. The first should be possible to accomplish as the clock interconnect network gets charged by half the voltage during each rising transition, and the second should be possible to accomplish by carefully time the rising and falling transitions, so that the third Fourier coefficient of the resulting wave form cancels. The drivers are loaded by eight 16-bit adders. The drivers’ power consumption, and the spectrum of the output signal, are investigated under varying clock frequencies, power supply voltage, and driver architecture. The results are compared to a conventional square wave clock. The results are that while the third harmonics of the resulting output sees an improvement in all the investigated cases over the square wave clock, the power savings are, for higher clock frequencies, more than completely canceled by the extra power needed in the logic stage which controls these drivers. On the other hand, the power consumption of the new driver appears to drop below that of the conventional driver when the clock frequency drops below approximately 100MHz. A few suggestions for further investigations of new designs and clock wave forms are given.

Power consumption of CMOS digital logic designs has increased rapidly for the last several years. It has become an important issue, not only in battery-powered applications, but also in high-performance digital designs because of packaging and cooling requirements. At multi-GHz clock rates in use today, charging and discharging CMOS gates and wires, especially in clocks with their relatively large capacitances, leads to significant power consumption. Recovering and recycling the stored charge or energy about to be lost when these nodes are discharged to ground is a potentially good strategy that must be explored for use in future energy-efficient design methodologies. This dissertation investigates a number of novel clock energy recycling techniques to improve the overall power dissipation of high-performance logic circuits. If efficient recycling energy of the clock network can be demonstrated, it might be used in many high-performance chip designs, to lower power and save energy. A number of chip prototypes were designed and constructed to demonstrate that this energy can be successfully recycled or recovered in different ways: • Recycling clock network energy by supplying a secondary DC-DC power converter: the output of this power converter can be used to supply another region of the chip, thereby avoiding the need to draw additional energy from the primary supply. One test chip demonstrates energy in the final clock load can be recycled, while another demonstrates that clock distribution energy can be recycled. • Recovering clock network energy and returning it back to the power grid: each clock cycle, a portion of the energy just drawn from the supply is transferred back at the end of the cycle, effectively reducing the power consumption of the clock network. The recycling methods described in this thesis are able to preserve the more ideal square clock shape which has been a limitation of previous work in this area. Overall, the results provided in this thesis demonstrate that energy recycling is very promising and must be pursued in a number of other areas of the chip in order to obtain an energy-efficient design.

<p>The activation and maintenance of plant immune responses require a significant amount of energy because they are accompanied by massive transcriptional reprogramming. Spurious activation of plant defense machinery can lead to autoimmune diseases and growth inhibition. So it is important for plants to tightly regulate the immune system to ensure the balance between growth and defense. However, neither the molecular mechanisms nor the design principles of how plants reach this balance are understood. </p><p>In this dissertation work, I showed how transcriptional and translational control of plant immune system can help avoid the constant immune surveillance and elicit a proper level of defense responses when necessary. These fine tunings of the immune system ensure the balance between growth and defense. </p><p>My research on the transcriptional regulation of plant defense responses led to the surprising discovery that even without pathogen, plant can 'anticipate' potential infection according to a circadian schedule under conditions that favor the initiation of infection. Functional analysis of 22 novel immune components unveiled their transient expression at dawn, when the infection is most likely to happen. This pulse expression pattern was shown to be regulated by the central circadian oscillator, CIRCADIAN CLOCK ASSOCIATED 1 (CCA1) since these 22 genes are no longer induced in the cca1 mutant. Moreover, the temporal control of the transcription level of these 22 immune genes by CCA1 also fine tunes their expression pattern according to the perceptions of different pathogenic signals. At the basal defense level, the expression of these genes can be transiently induced upon perceptions of critical infection stages of the pathogen. When an elevated level of defense response is needed, the high expression levels of these genes are maintained to confer a stronger immunity against pathogen. Since this stronger form of defense may also cause the suicidal death of the plant cells, the interplay between the circadian clock and defense allows a better decision on the proper level of the immunity to minimize the sacrificial death. The circadian clock is also known to regulate the growth-related cellular functions extensively. So the circadian clock can help to balance the energy used in growth and defense through transcriptional regulation on both sides.</p><p>Besides the integrated control by the circadian clock, the translational control on a key transcription factor involved in the growth-to-defense transition can also maintain the balance between growth and defense.TBF1 is a major transcription factor that can initiate the growth-to-defense transition through transcriptional repression of growth-associated cellular functions and induction of defense-related machinery. Bioinformatics studies identified 2 upstream open reading frames (uORFs) encoding multiple phenylalanine at 5' of the translation initiation codon of TBF1. Under normal conditions, these 2 uORFs can repress the translation of TBF1 to prevent accidental activation. However, pathogen infection may cause rapid and transient depletion of phenylalanine, a well-known precursor for cell wall components and the SAR signal SA. This depletion signal can be reflected by the increase of uncharged tRNAPhe, which subsequently leads to the phosphorylation of eIF2á and the release of uORFs' repression on TBF1. These findings provided the molecular details of how uORF-based translational control can couple transcriptional reprogramming with metabolic status to coordinately trigger the growth-to-defense transition. </p><p>In summary, my dissertation work has identified previously unrecognized regulatory mechanisms by which plant immune responses are balanced with growth. These new findings will further investigations into these novel interfaces between plants and pathogens. Future studies will definitely further improve our understandings of the plant-microbe interactions.</p> / Dissertation