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Erbium-doped fiber ring laser tuning using an intra-cavity Fabry-Perot filterMalik, Bilal Hameed 02 June 2009 (has links)
A tunable erbium-doped fiber ring laser using an intra-cavity Fabry-Perot filter as
the tuning element is investigated. Tuning is achieved by varying the applied voltage
which controls the FP cavity length. The laser's wavelength is monitored using an optical
spectrum analyzer to determine the laser's spectral characteristics under static conditions
at different wavelengths over its tuning range of approximately 50nm. When the laser is
tuned rapidly, the frequency versus time characteristic is determined using a fiber Fabry-Perot interferometer with a photodetector to convert the optical signal to an electrical
signal. The core of the research is to determine the degree of spectral broadening of the
laser as a function of the spectral tuning rate. The fringe contrast of fiber Fabry-Perot
interferometer transmittance curves decreases with increase in the tuning frequency. The
gain at a certain wavelength becomes a function of time putting an upper limit on the
tuning frequency of the system. The carrier lifetime of erbium ions dictates the maximum
achievable tuning speed.
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Time-resolved measurements of charge carrier dynamics in Mwir to Lwir InAs/InAsSb superlatticesAytac, Yigit 01 July 2016 (has links)
All-optical time-resolved measurement techniques provide a powerful tool for investigating critical parameters that determine the performance of infrared photodetector and emitter semiconductor materials. Narrow-bandgap InAs/GaSb type-II superlattices (T2SLs) have shown great promise as next generation materials, due to superior intrinsic properties and versatility. Unfortunately, InAs/GaSb T2SLs are plagued by parasitic Shockley-Read-Hall recombination centers that shorten the carrier lifetime and limit device performance. Ultrafast pump-probe techniques and time-resolved differential-transmission measurements are used here to demonstrate that "Ga-free" InAs/InAs₁₋xSbx T2SLs and InAsSb alloys do not have this same limitation and thus have significantly longer carrier lifetimes. Measurements of unintentionally doped MWIR and LWIR InAs/InAs₁₋xSbx T2SLs demonstrate minority carrier (MC) lifetimes of 18.4 µs and 4.5 µs at 77 K, respectively. This represents a more than two order of magnitude increase compared to the 90 ns MC lifetime measured in a comparable MWIR and LWIR InAs/GaSb T2SL. Through temperature-dependent differential-transmission measurements, the various carrier recombination processes are differentiated and the dominant recombination mechanisms identified for InAs/InAs₁₋xSbx T2SLs. These results demonstrate that these Ga-free materials are viable options over InAs/GaSb T2SLs and potentially bulk Hg₁₋xCdxTe photodetectors.
In addition to carrier lifetimes, the drift and diusion of excited charge carriers through the superlattice layers (i.e. in-plane transport) directly aects the performance of photo-detectors and emitters. All-optical ultrafast techniques were successfully used for a direct measure of in-plane diffusion coeffcients in MWIR InAs/InAsSb T2SLs using a photo-generated transient grating technique at various temperatures. Ambipolar diffusion coefficients of approximately 60 cm²/s were reported for MWIR InAs/InAs₁₋xSbxT2SLs at 293 K.
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Investigation of defects in n-type 4H-SiC and semi-insulating 6H-SiC using photoluminescence spectroscopyChanda, Sashi Kumar 06 August 2005 (has links)
Photoluminescence spectroscopy is one of the most efficient and sensitive non-contact techniques used to investigate defects in SiC. In this work, room temperature photoluminescence mapping is employed to identify different defects that influence material properties. The correlation of the distribution of these defects in n-type 4H-SiC substrates with electronic properties of SiC revealed connection between the deep levels acting as efficient recombination centers and doping in the substrate. Since deep levels are known to act as minority carrier lifetime killers, the obtained knowledge may contribute to our ability to control important characteristics such as minority carrier lifetime in SiC. In semi-insulating (SI) 6H-SiC, the correlation between room temperature infrared photoluminescence maps and the resistivity maps is used to identify deep defects responsible for semi-insulating behavior of the material. Different defects were found to be important in different families of SI SiC substrates, with often more than one type of defect playing a significant role. The obtained knowledge is expected to enhance the yield of SI SiC fabrication and the homogeneity of the resistivity distribution across the area of large SiC substrates.
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Carrier Lifetime Relevant Deep Levels in SiCBooker, Ian Don January 2015 (has links)
Silicon carbide (SiC) is currently under development for high power bipolar devices such as insulated gate bipolar transistors (IGBTs). A major issue for these devices is the charge carrier lifetime, which, in the absence of structural defects such as dislocations, is influenced by point defects and their associated deep levels. These defects provide energy levels within the bandgap and may act as either recombination or trapping centers, depending on whether they interact with both conduction and valence band or only one of the two bands. Of all deep levels know in 4H-SiC, the intrinsic carbon vacancy related Z1/2 is the most problematic since it is a very effective recombination center which is unavoidably formed during growth. Its concentration in the epilayer can be decreased for the production of high voltage devices by injecting interstitial carbon, for example by oxidation, which, however, results in the formation of other new deep levels. Apart from intrinsic crystal flaws, extrinsic defects such as transition metals may also produce deep levels within the bandgap, which in literature have so far only been shown to produce trapping effects. The focus of the thesis is the transient electrical and optical characterization of deep levels in SiC and their influence on the carrier lifetime. For this purpose, deep level transient spectroscopy (DLTS) and minority carrier transient spectroscopy (MCTS) variations were used in combination with time-resolved photoluminescence (TRPL). Paper 1 deals with a lifetime limiting deep level related to Fe-incorporation in n-type 4H-SiC during growth and papers 2 and 3 focus on identifying the main intrinsic recombination center in p-type 4H-SiC. In paper 4, the details of the charge carrier capture behavior of the deeper donor levels of the carbon vacancy, EH6/7, are investigated. Paper 5 deals with trapping effects created by unwanted incorporation of high amounts of boron during growth of n-type 4H-SiC which hinders the measurement of the carrier lifetime by room temperature TRPL. Finally, paper 6 is concerned with the characterization of oxidation-induced deep levels created in n- and p-type 4H- and 6H-SiC as a side-product of lifetime improvement by oxidation. In paper 1, the appearance of a new recombination center in n-type 4H-SiC, the RB1 level is discussed and the material is analyzed using room temperature TRPL, DLTS and pnjunction DLTS. The level appears to originate from a reactor contamination with Fe, a transition metal that generally leads to the formation of several trapping centers in the bandgap. Here it is found that under specific circumstances beneficial to the growth of high-quality material with a low Z1/2 concentration, the Fe incorporation also creates an additional recombination center capable of limiting the carrier lifetime. In paper 2, all deep levels found in p-type 4H-SiC grown at Linköping University which are accessible by DLTS and MCTS are investigated with regard to their efficiency as recombination centers. We find that none of the detectable levels is able to reduce carrier lifetime in p-type significantly, which points to the lifetime killer being located in the top half of the bandgap and having a large hole to electron capture cross section ratio (such as Z1/2, which is found in n-type material), making it undetectable by DLTS and MCTS. Paper 3 compares carrier lifetimes measured by temperature-dependent TRPL measurements in n- and p-type 4H-SiC and it is shown that the lifetime development over a large temperature range (77 - 1000 K) is similar in both types. This is interpreted as a further indication that the carbon vacancy related Z1/2 level is the main lifetime killer in p-type. In paper 4, the hole and electron capture cross sections of the near midgap deep levels EH6/7 are characterized. Both levels are capable of rapid electron capture but have only small hole capture rates, making them insignificant as recombination centers, despite their advantageous position near midgap. Minority carrier trapping by boron, which is both a p-type dopant and an unavoidable contaminant in 4H-SiC grown by CVD, is investigated in paper 5. Since even the shallow boron acceptor levels are relatively deep in the bandgap, minority trap and-release effects are detectable in room-temperature TRPL measurements. In case a high density of boron exists in n-type 4H-SiC, for example leached out from damaged graphite reactor parts during growth, we demonstrate that these trapping effects may be misinterpreted in room temperature TRPL measurements as a long free carrier lifetime. Paper 6 uses MCTS, DLTS, and room temperature TRPL to characterize the oxidation induced deep levels ON1 and ON2 in n- and p-type 4H- and their counterparts OS1-OS3 in 6H-SiC. The levels are found to all be positive-U, coupled two-levels defects which trap electrons efficiently but exhibit very inefficient hole capture once the defect is fully occupied by electrons. It is shown that these levels are incapable of significantly influencing carrier lifetime in epilayers which underwent high temperature lifetime enhancement oxidations. Due to their high density after oxidation and their high thermal stability they may, however, act to compensate n-type doping in low-doped material.
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Monocrystalline ZnTe/CdTe/MgCdTe Double Heterostructure Solar Cells Grown on InSb Substrates by Molecular Beam EpitaxyJanuary 2014 (has links)
abstract: There has been recent interest in demonstrating solar cells which approach the detailed-balance or thermodynamic efficiency limit in order to establish a model system for which mass-produced solar cells can be designed. Polycrystalline CdS/CdTe heterostructures are currently one of many competing solar cell material systems. Despite being polycrystalline, efficiencies up to 21 % have been demonstrated by the company First Solar. However, this efficiency is still far from the detailed-balance limit of 32.1 % for CdTe. This work explores the use of monocrystalline CdTe/MgCdTe and ZnTe/CdTe/MgCdTe double heterostructures (DHs) grown on (001) InSb substrates by molecular beam epitaxy (MBE) for photovoltaic applications.
Undoped CdTe/MgCdTe DHs are first grown in order to determine the material quality of the CdTe epilayer and to optimize the growth conditions. DH samples show strong photoluminescence with over double the intensity as that of a GaAs/AlGaAs DH with an identical layer structure. Time-resolved photoluminescence of the CdTe/MgCdTe DH gives a carrier lifetime of up to 179 ns for a 2 µm thick CdTe layer, which is more than one order of magnitude longer than that of polycrystalline CdTe films. MgCdTe barrier layers are found to be effective at confining photogenerated carriers and have a relatively low interface recombination velocity of 461 cm/s. The optimal growth temperature and Cd/Te flux ratio is determined to be 265 °C and 1.5, respectively.
Monocrystalline ZnTe/CdTe/MgCdTe P-n-N DH solar cells are designed, grown, processed into solar cell devices, and characterized. A maximum efficiency of 6.11 % is demonstrated for samples without an anti-reflection coating. The low efficiency is mainly due to the low open-circuit voltage (V<sub>oc</sub>), which is attributed to high dark current caused by interface recombination at the ZnTe/CdTe interface. Low-temperature measurements show a linear increase in V<sub>oc</sub> with decreasing temperature down to 77 K, which suggests that the room-temperature operation is limited by non-radiative recombination. An open-circuit voltage of 1.22 V and an efficiency of 8.46 % is demonstrated at 77 K. It is expected that a coherently strained MgCdTe/CdTe/MgCdTe DH solar cell design will produce higher efficiency and V<sub>oc</sub> compared to the ZnTe/CdTe/MgCdTe design with relaxed ZnTe layer. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2014
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Study of Minority Carrier Lifetime and Transport in InAs/InAsSb type-II Superlattices Using a Real-Time Baseline Correction MethodJanuary 2016 (has links)
abstract: Sb-based type-II superlattices (T2SLs) are potential alternative to HgCdTe for infrared detection due to their low manufacturing cost, good uniformity, high structural stability, and suppressed Auger recombination. The emerging InAs/InAsSb T2SLs have minority carrier lifetimes 1-2 orders of magnitude longer than those of the well-studied InAs/InGaSb T2SLs, and therefore have the potential to achieve photodetectors with higher performance. This work develops a novel method to measure the minority carrier lifetimes in infrared materials, and reports a comprehensive characterization of minority carrier lifetime and transport in InAs/InAsSb T2SLs at temperatures below 77 K.
A real-time baseline correction (RBC) method for minority carrier lifetime measurement is developed by upgrading a conventional boxcar-based time-resolved photoluminescence (TRPL) experimental system that suffers from low signal-to-noise ratio due to strong low frequency noise. The key is to modify the impulse response of the conventional TRPL system, and therefore the system becomes less sensitive to the dominant noise. Using this RBC method, the signal-to-noise ratio is improved by 2 orders of magnitude.
A record long minority carrier lifetime of 12.8 μs is observed in a high-quality mid-wavelength infrared InAs/InAsSb T2SLs at 15 K. It is further discovered that this long lifetime is partially due to strong carrier localization, which is revealed by temperature-dependent photoluminescence (PL) and TRPL measurements for InAs/InAsSb T2SLs with different period thicknesses. Moreover, the PL and TRPL results suggest that the atomic layer thickness variation is the main origin of carrier localization, which is further confirmed by a calculation using transfer matrix method.
To study the impact of the carrier localization on the device performance of InAs/InAsSb photodetectors, minority hole diffusion lengths are determined by the simulation of external quantum efficiency (EQE). A comparative study shows that carrier localization has negligible effect on the minority hole diffusion length in InAs/InAsSb T2SLs, and the long minority carrier lifetimes enhanced by carrier localization is not beneficial for photodetector operation. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2016
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Carrier Lifetime Measurement for Characterization of Ultraclean Thin p/p+ Silicon Epitaxial LayersJanuary 2013 (has links)
abstract: Carrier lifetime is one of the few parameters which can give information about the low defect densities in today's semiconductors. In principle there is no lower limit to the defect density determined by lifetime measurements. No other technique can easily detect defect densities as low as 10-9 - 10-10 cm-3 in a simple, contactless room temperature measurement. However in practice, recombination lifetime τr measurements such as photoconductance decay (PCD) and surface photovoltage (SPV) that are widely used for characterization of bulk wafers face serious limitations when applied to thin epitaxial layers, where the layer thickness is smaller than the minority carrier diffusion length Ln. Other methods such as microwave photoconductance decay (µ-PCD), photoluminescence (PL), and frequency-dependent SPV, where the generated excess carriers are confined to the epitaxial layer width by using short excitation wavelengths, require complicated configuration and extensive surface passivation processes that make them time-consuming and not suitable for process screening purposes. Generation lifetime τg, typically measured with pulsed MOS capacitors (MOS-C) as test structures, has been shown to be an eminently suitable technique for characterization of thin epitaxial layers. It is for these reasons that the IC community, largely concerned with unipolar MOS devices, uses lifetime measurements as a "process cleanliness monitor." However when dealing with ultraclean epitaxial wafers, the classic MOS-C technique measures an effective generation lifetime τg eff which is dominated by the surface generation and hence cannot be used for screening impurity densities. I have developed a modified pulsed MOS technique for measuring generation lifetime in ultraclean thin p/p+ epitaxial layers which can be used to detect metallic impurities with densities as low as 10-10 cm-3. The widely used classic version has been shown to be unable to effectively detect such low impurity densities due to the domination of surface generation; whereas, the modified version can be used suitably as a metallic impurity density monitoring tool for such cases. / Dissertation/Thesis / M.S. Materials Science and Engineering 2013
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Zpětné zotavení ve výkonových integrovaných obvodech / Reverse recovery in power integrated circuitsŠuľan, Dušan January 2016 (has links)
Předkládaná práce se zabývá parametrem “Reverse Recovery Time“ u polovodičových prvků a jeho vlivem na typické spínací obvody. V první části práce je objasněno co je “Reverse Recovery Time“ a jeho jednotlivé části. V další sekci je popsána jeho fyzikální podstata. Na konci teoretická části je rozebrán jeho efekt na spínací ztráty a doporučená metoda měření tohto parametru . Praktická část práce je zaměřena na simulace Dpdr45nres45 v prostředích Cadence a TCAD. Poslední část se zabývá návrhem obvodu na měření u reálných diod a samotným měřením diod a tranzistorů.
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Absorber and Window Study – CdSexTe1-x/CdTe Thin Film Solar CellsHsu, Chih-An 17 January 2019 (has links)
CdTe an II-VI semiconductor has been a leading thin film photovoltaic material due to its near ideal bandgap and high absorption coefficient [1]. The typical thin film CdTe solar cells have been of the superstrate configuration with CdS (Eg-2.42eV) as the n-type heterojunction partner. Due to the relatively narrow bandgap of CdS, a wider bandgap n-type window layer has recently emerged as a promising substitute: alloys of MgyZn1-yO have been successfully used as the emitter or window layer. The benefits in the usage of MgyZn1-yO (MZO) are its tunable bandgap and wide optical spectrum on optoelectronic devices. Due to an increasing bandgap of the window layer, the carrier collection can be improved in the short wavelength range (<500 nm). In addition alloys of CdSexTe1-x (CST) have also been used in the absorber layer (i.e., CST/CdTe) for the fabrication of CdTe devices to improve the carrier collection and lifetime [2]. The lower bandgap of the CST alloy can lead to higher short-circuit current (JSC), but it can also result in lower open circuit voltage (VOC). Another critical aspect of the CdTe solar cell is the use of copper as a p-type dopant, which is typically incorporated in the cell during the fabrication of the back contact. The most challenging issue related to further advancing the CdTe solar cell efficiency is the relatively low level of p-type doping, which limits the VOC. Efforts to dope CdTe with group V dopants are yet to produce the desired results.
ZnO has been used as an effective high resistivity transparent. When CdTe is deposited directly on sputtered ZnO, VOC of typically 500-600 mV is produced. Band alignment measurements indicate that a negative conduction band offset with CdS exists; alloying with MgO to produce MgyZn1-yO with a composition of y = 0.15 can produce a flat conduction band alignment with CdS. This material has an additional benefit for improving the energy bandgap of the MZO for better UV light transmission in the short wavelengths. By changing the magnesium content from y = 0 to 0.30 allowed researchers to make the tunable conduction band offset from a “cliff” to a “spike,” with both increased open-circuit voltage and fill factor as increasing magnesium compositions [3] — the bandgap gains as expected with increased magnesium composition. The large compositions (y > 0.30) of MgyZn1-yO cause the enormous spike result in S-kink in the IV measurement so that the FF decreases. Besides, due to the instability of MZO material, the fabrication process has to proceed carefully.
The properties of CST films and cells were investigated as a function of Se composition (x), substrate temperature (TSUB), and ambient used during the CSS deposition. The higher ratio of Se in CST alloy causes the smaller grain structures and lower bandgap, which profoundly detrimental to the device performance (VOC). However, the CST can be deposited in various substrate temperatures and different inert ambient gas to improve the grain structure by utilizing the especial Close Space Sublimation (CSS) deposition system. Therefore, despite the fact that the CST (25% Se) has the optical bandgap (1.37eV), the improvement of grain structure can slightly increase the doping concentration and decrease the grain boundary (GBs) due to increased alloys grain size 3X larger, which is contributed to improving the VOC [4]. The study of higher ratio Se of CST alloy is significant to achieve the high efficiency polycrystalline CST/CdTe photovoltaic devices.
The effect of Cu doping back contact in CdSexTe1-x (CST)/CdTe solar cells with varying amounts of Se (x) has been investigated. The Cu-based back contact was annealed at different thermal temperatures in order to vary the amount of Cu in-diffusion. Net p-type doping was found to increase as the back-contact annealing temperature increased. All cells exhibited a decrease in VOC with increased annealing temperature (i.e., higher Cu concertation), presumably due to a degradation of the lifetime with increased amounts of Cu [5]. However, cells with the highest Se composition appeared to exhibit a higher degree of tolerance to the amount of Cu – i.e., they exhibited a smaller loss in VOC with the increased amount of Cu.
Extrinsic p-type doping of CdSeTe can be fabricated using two different experimental processes. Firstly, by using group I elements such as, Cu to substitute Cd, which is promising during the back contact process. Secondly, using group V (P, As, Sb) elements to substitute Te, and this is suitable for Cd-rich of intrinsic CdTe. Intrinsic CST alloy has lower hole density concentration as higher Se composition with limitation of the VOC. Thus, in order to increase the p-type net doping up to 1016 cm-3 the extrinsic P or As doping have been widely investigated recently. The research studies show the CST/CdTe devices lead to improve VOC up to 850 mV with higher hole density in higher Se compositions of As doped CST alloys. Nevertheless, the group V doped CdTe still cause the formation of compensating defects limits the upper boundary of dupability on the CdTe thin film solar cells. Even if a high hole density concentration is achieved for intrinsically-doped p-type CST/CdTe, it is believed the poor carrier lifetime in the CdTe side would still limit the VOC.
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Enhancement of Carrier Lifetimes in SiC and Fabrication of Bipolar Junction Transistors / SiCのキャリア寿命向上およびバイポーラトランジスタの作製Okuda, Takafumi 24 September 2015 (has links)
京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第19312号 / 工博第4109号 / 新制||工||1633(附属図書館) / 32314 / 京都大学大学院工学研究科電子工学専攻 / (主査)教授 木本 恒暢, 教授 引原 隆士, 准教授 船戸 充 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM
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