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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

The Modeling and Control of a Cascaded-Multilevel Converter-Based STATCOM

Sirisukprasert, Siriroj 23 April 2004 (has links)
This dissertation is dedicated to a comprehensive study of static synchronous compensator (STATCOM) systems utilizing cascaded-multilevel converters (CMCs). Among flexible AC transmission system (FACTS) controllers, the STATCOM has shown feasibility in terms of cost-effectiveness in a wide range of problem-solving abilities from transmission to distribution levels. Referring to the literature reviews, the CMC with separated DC capacitors is clearly the most feasible topology for use as a power converter in the STATCOM applications. The controls for the CMC-based STATCOM were, however, very complicated. The intricate control design was begun without well-defined system transfer functions. The control compensators were, therefore, randomly selected. The stability of the system was achieved by trial and error processes, which were time-consuming and ineffective. To be able to operate in a high-voltage application, a large number of DC capacitors are utilized in a CMC-based STATCOM. All DC capacitor voltages must be balanced in order to avoid over-voltages on any particular link. Not only do these uneven DC voltages introduce voltage stress on the semiconductor switches, but they also lower the quality of the synthesized output waveforms of the converter. Previous researches into DC capacitor voltage-balancing techniques were very straightforward, in that individual voltage compensators were added into the main control loop. However, the compensator design for these individual loops is very problematic because of the complexity of the voltage-loop transfer functions. Basically, the trial and error technique again provides the simplest way to achieve acceptable compensators. Moreover, the greater number of voltage levels, the more complex the control design, and the main controller must perform all of the feedback control procedures. As a result, this approach potentially reduces the reliability of the controller. The goal of this dissertation is to achieve high-performance, reliable, flexible, cost-effective power stages and controllers for the CMC-based STATCOM. Major contributions are addressed as follows: 1) optimized design for the CMC-based STATCOM power stages and passive components, 2) accurate models of the CMC for reactive power compensations in both ABC and DQ0 coordinates, 3) an effective decoupling power control technique, 4) DC-link balancing strategies; and 5) improvements in the CMC topology. To enhance the modularity and output voltage of the CMC, the high-switching-frequency, high-power H-bridge building block (HBBB) and the optimized design for its power stage and snubber circuits are first proposed. The high-switching-frequency feature is achieved by utilizing the Virginia Tech-patented emitter turn-off (ETO) thyristor. Three high-power HBBB prototypes were implemented, and their performance was experimentally verified. To simplify the control system design, well-defined models of the CMC in both ABC and DQ0 coordinates are proposed. The proposed models are for the CMC with any number of voltage levels. The key system transfer functions are achieved and used in the control design processes. To achieve independent power control capability, the control technique, called the decoupling power control, is proposed. By applying this control technique, real and reactive power components can be controlled separately. In order to balance the DC capacitor voltages, a new, effective pulse width modulation (PWM) technique, which is suitable for any number of H-bridge converters, is proposed. The proposed cascaded PWM algorithm can be practically realized into the field programmable gate arrays (FPGA), and its complexity is not affected by the number of voltage levels. In addition, the complexity of the main controller, which is essentially based on the digital signal processor (DSP), is no longer a function of the number of the output voltage levels. The basic structure of the cascaded PWM is modular, which, in general, enhances the modularity of the CMC power stages. With the combination of the decoupling power control and the cascaded PWM, a CMC with any number of voltage levels can be simply modeled as a three-level cascaded converter, which is the simplest topology to deal with. This significantly simplifies and optimizes the control design process. To verify the accuracy of the proposed models and the performance of the control system for the CMC-based STATCOM, a low-power, seven-level cascaded-based STATCOM hardware prototype is implemented. The key control procedures are performed by a main controller, which consists of a DSP and an FPGA. The simulation and experimental results indicate the superior performance of the proposed control system, as well as the precision of the proposed models. / Ph. D.
2

Modeling and Simulation of a Cascaded Three-Level Converter-Based SSSC

Hawley, Joshua Christiaan 06 September 2004 (has links)
This thesis is dedicated to a comprehensive study of static series synchronous compensator (SSSC) systems utilizing cascaded-multilevel converters (CMCs). Among flexible AC transmission system (FACTS) controllers, the SSSC has shown feasibility in terms of cost-effectiveness in a wide range of problem-solving abilities from transmission to distribution levels. Referring to the literature reviews, the CMC with separated DC capacitors is clearly the most feasible topology for use as a power converter in the SSSC applications. The control for the CMC-Based SSSC is complicated. The design of the complicated control strategy was begun with well-defined system transfer functions. The stability of the system was achieved by trial and error processes, which were time-consuming and ineffective. The goal of this thesis is to achieve a reliable controller design for the CMC-based SSSC. Major contributions are addressed as follows: 1) accurate models of the CMC for reactive power compensations in both ABC and DQ0 coordinates, and 2) an effective decoupling power control technique. To simplify the control system design, well-defined models of the CMC-Based SSSC in both ABC and DQ0 coordinates are proposed. The proposed models are for the CMC-Based SSSC focus on only three voltage levels but can be expanded for any number of voltage levels. The key system transfer functions are derived and used in the controller design process. To achieve independent power control capability, the control technique, called the decoupling power control used in the design for the CMC-Based STATCOM is applied. This control technique allows both the real and reactive power components to be independently controlled. With the combination of the decoupling power control and the cascaded PWM, a CMC with any number of voltage levels can be simply modeled as a three-level cascaded converter, which is the simplest topology to deal with. This thesis focuses on the detailed design process needed for a CMC-Based SSSC. / Master of Science
3

Estratégias de modulação para conversores multiníveis em cascata sob faltas / New modulation strategies for cascaded multilevel converters

Carnielutti, Fernanda de Morais 20 January 2012 (has links)
Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Multilevel converters are being increasingly employed nowadays, specially in mediumand high-voltage industrial applications. Even though these converters are able to synthesize output line-to-line voltages with a high number of levels, close to a sinusoidal waveform, their modulation is more complex than the one for two- and three-level converters. In this context, this dissertation proposes new modulation strategies for multilevel converters, specifically symmetrical and asymmetrical cascaded multilevel ones, composed of many full-bridges, or power cells, per phase. If the converter has one or more faulty cells, they can be bypassed and the converter can continue to feed the load, increasing the process reliability. However, the converter phase voltages must be modified so as to keep the output line-to-line voltages balanced. With the objective of proposing modulation strategies that allow the cascaded multilevel converters to satisfactorily operate under these conditions, an extensive bibliographical review of the existing modulation techniques has been carried out. The carrier-based modulation approaches were studied first. It could be noticed that all these strategies belong to a larger set of solutions for the obtention of the converter modulating phase voltages. This set is derived in this work, resulting in a generalized geometrical modulation strategy for symmetrical and asymmetrical cascaded multilevel converters with any number of levels and operating under normal or faulty conditions. As the faulty cells are restrictions for converter operation, for each fault condition the region that contains all the possible converter common-mode voltages, that compensate for the loss of cells, is derived. The choice of a common-mode pertaining to this set allows the entire converter synthesis capability to be explored. The modulating voltages are the sum of the reference and the common-mode voltages, maximizing the amplitudes of the output line-to-line voltages. For asymmetrical cascaded multilevel converters, the voltages synthesized by the highervoltage cells are restrictions for the operation of the lower-voltage ones. Concerning the Space Vector (SV) modulation, it was derived only for the asymmetrical cascaded multilevel converter. The higher-voltage and lower-voltage cells switch, respectively, with low frequency by the choice of the nearest vector to the reference, and with high frequency, by the choice of the three nearest vectors to the reference, in one switching period. The voltage synthesized by the higher-voltage cells is subtracted from the reference, resulting in the new reference for the lower-voltage cells, and so successively, until the cells with the lowest voltages. A specific switching sequence is defined off-line for each sector of the SV diagram. The algorithm is carried out in a modified αβo coordinate system, resulting in switching vector with only integer entries. The choice of the switching vectors considers all the possible redundancies in abc coordinates. At last, simulation and experimental results Abstract that prove the good performance of the proposed modulation strategies are presented. / Conversores multiníveis são cada vez mais empregados, especialmente em aplicações industriais de média e alta tens~ao. Apesar de serem capazes de sintetizar tensões de linha de saída com um grande número de níveis, se aproximando de uma forma de onda senoidal, sua modulação é mais complexa, quando comparada com conversores de dois ou três níveis. Neste contexto, esta dissertação propõe novas estratégias de modulação para conversores multiníveis, especificamente multiníveis em cascata simétricos e assimétricos, compostos por diversos full-bridges, ou células de potência, por fase. Caso uma ou mais células sofram faltas, estas podem ser retiradas de operação, e o conversor pode continuar a alimentar a carga, aumentando a confiabilidade do processo. Contudo, as tensõe de fase do conversor devem ser modificadas, a fim de manter as tensões de linha de saída equilibradas. Com o objetivo de propor estratégias de modulação que permitam aos conversores multiníveis em cascata operar satisfatoriamente nestas condições, foi realizada uma extensa pesquisa bibliográfica a respeito dos métodos de modulação já existentes na literatura. Primeiramente, foram estudadas estratégias de modulação baseadas em portadora. Pode-se perceber que estas pertencem a um conjunto maior de possíveis soluções para a obtenção das tensões modulantes para as fases do conversor. Este conjunto é derivado neste trabalho, resultando em uma estratégia generalizada de modulação com abordagem geométrica para conversores multiníveis em cascata simétricos e assimétricos com qualquer número de níveis, em operação normal ou sob faltas. Como as células com falta são restrições para o funcionamento do conversor, para cada condição de falta é definida a região que contém todas as possíveis tensões de modo comum que podem ser sintetizadas pelo conversor a fim de compensar a perda de células. A escolha de uma tensão de modo comum pertencente a este conjunto permite explorar toda a capacidade de síntese de tensão do conversor. As tensões modulantes são obtidas como a soma das tensões de referência de fase e de modo comum, maximizando as amplitudes das componentes fundamentais das tensões de linha de saída. Para os conversores multiníveis em cascata assimétricos, as tensões sintetizadas pelas células de maior tensão são restrições para a operação das demais. Quanto à modulação Space Vector (SV), optou-se por desenvolvê-la apenas para conversores multiníveis em cascata assimétricos. As células de alta tensão comutam em baixa frequência pela escolha do vetor mais próximo da referência, e as células de baixa tensão comutam em alta frequência pela escolha dos três vetores mais próximos da referência, em um período de comutação. A tensão sintetizada pelas células de alta tensão é subtraída da referência, resultando na nova referência para as próximas células, e assim sucessivamente até as células de menor tensão. Para cada setor do Resumo diagrama SV é definida off-line uma sequência de comutação específica. O algoritmo implementado realiza todos os cálculos em um sistema de coordenadas αβo modificado, resultando em vetores de comutação apenas com elementos inteiros. A escolha dos vetores de comutação a serem implementados considera todas as suas possíveis redundâncias em coordenadas abc. Por fim, são apresentados resultados de simulação e experimentais que comprovam o ótimo desempenho das estratégias de modulação propostas neste trabalho.
4

Modulação space vector para conversores multiníveis com células assimétricas em cascata sob condições de faltas / Space vector modulation for cascaded multilevel converters with asymmetric cells under fault conditions

Carnielutti, Fernanda de Morais 09 October 2015 (has links)
Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This Thesis proposes a Space Vector Modulation for cascaded miltilevel converters with asymmetric cells under normal conditions and with faults in the power cells, avoiding converter saturation as much as possible. The switching state vectors and the voltage references are represented in the output line-to-line voltages coordinate system. Under this representation, the switching state vectors have only integer entries, easing the implementation of the proposed algorithm. The modulation is developed in a way such as to guarantee that the higher voltage cells switch at low frequency by the choice of only one vector per switching period, minimizing the switching losses. For the lower voltage cells (1pu), that switch with PWM, three algorithms were developed for defining the switching sequences: (i) offline, (ii) online and (iii) hybrid, where a carrier-based geometrical modulation and the SV are mixed in a simple and unified approach. The algorithm is described in a generic way, for converters with any number of levels, and then, simulation and experimental results are shown for, respectively, cascaded miltilevel converters with asymmetric cells with DC bus voltages ratio of 1:2:4pu and 1:2pu. The algorithm does not use conventional separation lines to find where the multiple references for the power cells are located inside the SV diagram. It also avoids converter saturation and, when it is unavoidable, detects its occurrence and changes the operation mode to overmodulation. This one is treated as a modification of the orignal algorithm, allowing the converter to operate with a wider range of modulation indexes and fault conditions. It is shown that two overmodulation modes can occur: in the first, there is still an area inside the SV diagram where overmodulation is avoided, and, in the second, the converter overmodulates during almost all the time. Modulation strategies are proposed for both cases, including the insertion of a bandpass filter in the second case, so as to minimize the distortions and unbalances that arise on the converter output line-to-line voltages during this operation mode. For the overmodulation, simulation and experimental results are also shown for cascaded miltilevel converters with asymmetric cells with DC bus voltages ratio of 1:2:4pu and 1:2pu. Finally, the final conclusions are drawn and future works are proposed. / Esta Tese propõe uma estratégia de modulação Space Vector (SV) para conversores multiníveis com células assimétricas em cascata durante operação normal e com faltas nas células de potência, garantindo a não ocorrência de saturação do conversor sempre que esta não for desejada, especialmente durante faltas. Os vetores de comutação e as referências de tensão são representados no sistema de coordenadas das tensões de linha de saída. Desta forma, os vetores de comutação apresentam apenas coordenadas inteiras, facilitando a implementação do algoritmo proposto. A modulação é desenvolvida de forma a garantir que as células de maior tensão comutem em baixa frequência, pela escolha de apenas um vetor por período de comutação, minimizando as perdas de comutação do conversor. Para as células de menor tensão (1pu), que comutam com PWM, foram desenvolvidos três algoritmos para definição das sequências de comutação: definição (i) offline, (ii) online e (iii) híbrida, onde as modulações geométrica com portadora e SV são mescladas em uma abordagem única e simplificada. O algoritmo SV é descrito de maneira genérica, para conversores com qualquer número de níveis, e, na sequência, são apresentados resultados de simulação e experimentais para, respectivamente, conversores multiníveis com células assimétricas em cascata com razão das tensões dos barramentos CC de 1:2:4pu e 1:2pu. Este algoritmo não faz uso de retas de separação convencionais para encontrar os domínios onde as múltiplas referências para as células de potência se encontram dentro do diagrama SV. Também evita ao máximo a saturação do conversor, e, quando esta é inevitável, detecta sua ocorrência e muda o modo de operação para sobremodulação. Esta é tratada por meio de modificações no algoritmo original, permitindo a operação do conversor com um maior número de índices de modulação e condições de falta. É mostrado que existem dois casos de sobremodulação durante faltas nas células de potência: no primeiro, ainda há uma área no interior do diagrama SV onde a sobremodulação é evitada, e, no segundo, o conversor sobremodula durante praticamente todo o tempo. São propostas estratégias de modulação para ambos os casos, incluindo a inserção de um filtro passa-faixa no segundo, para minimizar as distorções e os desequilíbrios que surgem nas tensões de linha de saída do conversor, quando este se encontra neste modo de operação. Para a sobremodulação, também são apresentados resultados de simulação e experimentais para os conversores multiníveis com células assimétricas em cascata com razão das tensões dos barramentos CC de 1:2:4pu e 1:2pu. Por fim, as conclusões finais são apresentadas e são propostos trabalhos futuros.

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