No description available.

No description available.

No description available.

The modulation methods Space Vector PWM (SVPWM), Discontinuous PWM (DPWM1, DPWMMAX) and six-step mode are investigated in the overmodulation range of a voltage-fed induction motor drive. This area enables an increase of inverter output voltage so that drive performance can be enhanced. Though, pulse dropping occurs which results in increased iron losses and current waveform quality degradation. Due to differences in harmonic distortion the modulation methods cause various torque oscillations and power losses in induction motors and inverter drives. To quantify these effects in a squirrel cage induction motor drive a simulation model containing a finite element machine model and an analytic inverter model is developed, in order to find the PWM scheme offering maximum torque and minimal power losses. Additionally, the holistic investigation of machine and inverter losses allows for making statements concerning total losses of drive systems and the most suitable overmodulation scheme for the application.

A voltage source inverter is commonly used to supply a variable frequency variable voltage to a three phase induction motor in a variable speed application. A suitable pulse width modulation (PWM) technique is employed to obtain the required output voltage in the line side of the inverter. Real-time methods for PWM generation can be broadly classified into triangle comparison based PWM (TCPWM) and space vector based PWM (SVPWM). In TCPWM methods such as sine-triangle PWM, three phase reference modulating signals are compared against a common triangular carrier to generate the PWM signals for the three phases. In SVPWM methods, a revolving reference voltage vector is provided as voltage reference instead of three phase modulating waves. The magnitude and frequency of the fundamental component in the line side are controlled by the magnitude and frequency, respectively, of the reference vector. The fundamental line side voltage is proportional to the reference magnitude during linear modulation. With sine-triangle PWM, the highest possible peak phase fundamental voltage is 0.5Vdc, where Vdc is the DC bus voltage, in the linear modulation zone. With techniques such as third harmonic injection PWM and space vector based PWM, the peak phase fundamental voltage can be as high as (formula) (i.e., 0:577Vdc)during linear modulation. To increase the line side voltage further, the operation of the VSI must be extended into the overmodulation region. The overmodulation region extends upto the six-step mode, which gives the highest possible ac voltage for a given (formula). In TCPWM based methods, increasing the reference magnitude beyond a certain level leads to pulse dropping, and gradually leads to six-step operation. However, in SVPWM methods, an overmodulation algorithm is required for controlling the line-side voltage during overmodulation and to achieve a smooth transition from PWM to six-step mode. Numerous overmodulation algorithms have been proposed in the literature for space vector modulated inverter. A well known algorithm among these divides the overmodulation zone into two zones, namely zone-I and zone-II. This is termed as the 'existing overmodulation algorithm' here. This algorithm is modified in the present work to reduce computational burden without much increase in the line current distortion. During overmodulation, the fundamental line side voltage and the reference magnitude are not proportional, which is undesirable from the control point of view. The present work ensures a linear relationship between the two. Apart from the fundamental component, the inverter output voltage mainly consists of harmonic components at high frequencies (around switching frequency and the integral multiples) during linear modulation. However, during overmodulation, low order harmonic components such as 5th, 7th, 11th, 13th etc., are also present in the output voltage. These low order harmonic voltages lead to low order harmonic currents in the motor. The sum of the lower order harmonic currents is termed as 'lower order current ripple'. The present thesis proposes a method for estimation of lower order current ripple in real-time. In closed loop current control, the motor current is fed back to the current controller. During overmodulation, the motor current contains low order harmonics, which appear in the current error fed to the controller. These harmonic currents are amplified by the current error amplifier deteriorating the performance of the drive. It is possible to filter the lower order harmonic currents before being fed back. However, filtering introduces delay in the current loop, and reduces the bandwidth even during linear modulation. In the present work, the estimated lower order current ripple is subtracted from the measured current before the latter is fed back to the controller. The estimation of lower order current ripple and the proposed current control are verified through simulation using MATLAB/SIMULINK and also experimentally on a laboratory prototype. The experimental setup comprises of a field programmable gate arrays (FPGA) based digital controller, an IGBT based inverter and a four-pole squirrel cage induction motor. (Pl refer the original document for formula)

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This Thesis proposes a Space Vector Modulation for cascaded miltilevel converters with asymmetric cells under normal conditions and with faults in the power cells, avoiding converter saturation as much as possible. The switching state vectors and the voltage references are represented in the output line-to-line voltages coordinate system. Under this representation, the switching state vectors have only integer entries, easing the implementation of the proposed algorithm. The modulation is developed in a way such as to guarantee that the higher voltage cells switch at low frequency by the choice of only one vector per switching period, minimizing the switching losses. For the lower voltage cells (1pu), that switch with PWM, three algorithms were developed for defining the switching sequences: (i) offline, (ii) online and (iii) hybrid, where a carrier-based geometrical modulation and the SV are mixed in a simple and unified approach. The algorithm is described in a generic way, for converters with any number of levels, and then, simulation and experimental results are shown for, respectively, cascaded miltilevel converters with asymmetric cells with DC bus voltages ratio of 1:2:4pu and 1:2pu. The algorithm does not use conventional separation lines to find where the multiple references for the power cells are located inside the SV diagram. It also avoids converter saturation and, when it is unavoidable, detects its occurrence and changes the operation mode to overmodulation. This one is treated as a modification of the orignal algorithm, allowing the converter to operate with a wider range of modulation indexes and fault conditions. It is shown that two overmodulation modes can occur: in the first, there is still an area inside the SV diagram where overmodulation is avoided, and, in the second, the converter overmodulates during almost all the time. Modulation strategies are proposed for both cases, including the insertion of a bandpass filter in the second case, so as to minimize the distortions and unbalances that arise on the converter output line-to-line voltages during this operation mode. For the overmodulation, simulation and experimental results are also shown for cascaded miltilevel converters with asymmetric cells with DC bus voltages ratio of 1:2:4pu and 1:2pu. Finally, the final conclusions are drawn and future works are proposed. / Esta Tese propõe uma estratégia de modulação Space Vector (SV) para conversores multiníveis com células assimétricas em cascata durante operação normal e com faltas nas células de potência, garantindo a não ocorrência de saturação do conversor sempre que esta não for desejada, especialmente durante faltas. Os vetores de comutação e as referências de tensão são representados no sistema de coordenadas das tensões de linha de saída. Desta forma, os vetores de comutação apresentam apenas coordenadas inteiras, facilitando a implementação do algoritmo proposto. A modulação é desenvolvida de forma a garantir que as células de maior tensão comutem em baixa frequência, pela escolha de apenas um vetor por período de comutação, minimizando as perdas de comutação do conversor. Para as células de menor tensão (1pu), que comutam com PWM, foram desenvolvidos três algoritmos para definição das sequências de comutação: definição (i) offline, (ii) online e (iii) híbrida, onde as modulações geométrica com portadora e SV são mescladas em uma abordagem única e simplificada. O algoritmo SV é descrito de maneira genérica, para conversores com qualquer número de níveis, e, na sequência, são apresentados resultados de simulação e experimentais para, respectivamente, conversores multiníveis com células assimétricas em cascata com razão das tensões dos barramentos CC de 1:2:4pu e 1:2pu. Este algoritmo não faz uso de retas de separação convencionais para encontrar os domínios onde as múltiplas referências para as células de potência se encontram dentro do diagrama SV. Também evita ao máximo a saturação do conversor, e, quando esta é inevitável, detecta sua ocorrência e muda o modo de operação para sobremodulação. Esta é tratada por meio de modificações no algoritmo original, permitindo a operação do conversor com um maior número de índices de modulação e condições de falta. É mostrado que existem dois casos de sobremodulação durante faltas nas células de potência: no primeiro, ainda há uma área no interior do diagrama SV onde a sobremodulação é evitada, e, no segundo, o conversor sobremodula durante praticamente todo o tempo. São propostas estratégias de modulação para ambos os casos, incluindo a inserção de um filtro passa-faixa no segundo, para minimizar as distorções e os desequilíbrios que surgem nas tensões de linha de saída do conversor, quando este se encontra neste modo de operação. Para a sobremodulação, também são apresentados resultados de simulação e experimentais para os conversores multiníveis com células assimétricas em cascata com razão das tensões dos barramentos CC de 1:2:4pu e 1:2pu. Por fim, as conclusões finais são apresentadas e são propostos trabalhos futuros.

In high power induction motor drives, the switching frequency of the inverter is quite low due to the high losses in the power devices. Real-time PWM strategies, which result in reduced harmonic distortion under low switching frequencies and have maximum possible DC bus utilisation, are developed for such drives in the present work. The space vector approach is taken up for the generation of synchronised PWM waveforms with 3-Phase Symmetry, Half Wave Symmetry and Quarter Wave Symmetry, required for high-power drives. Rules for synchronisation and the waveform symmetries are brought out. These rules are applied to the conventional and modified forms of space vector modulation, leading to the synchronised conventional space vector strategy and the Basic Bus Clamping Strategy-I, respectively. Further, four new synchronised, bus-clamping PWM strategies, namely Asymmetric Zero-Changing Strategy, Boundary Sampling Strategy-I, Basic Bus Clamping Strategy-II and Boundary Sampling Strategy-II, are proposed. These strategies exploit the flexibilities offered by the space vector approach like double-switching of a phase within a subcycle, clamping of two phases within a subcycle etc. It is shown that the PWM waveforms generated by these strategies cannot be generated by comparing suitable 3-phase modulating waves with a triangular carrier wave. A modified two-zone approach to overmodulation is proposed. This is applied to the six synchronised PWM strategies, dealt with in the present work, to extend the operation of these strategies upto the six-step mode. Linearity is ensured between the magnitude of the reference and the fundamental voltage generated in the whole range of modulation upto the six-step mode. This is verified experimentally. A suitable combination of these strategies leads to a significant reduction in the harmonic distortion of the drive at medium and high speed ranges over the conventional space vector strategy. This reduction in harmonic distortion is demonstrated, theoretically as well as experimentally, on a constant V/F drive of base frequency 50Hz for three values of maximum switching frequency of the inverter, namely 450Hz, 350Hz and 250Hz. Based on the notion of stator flux ripple, analytical closed-form expressions are derived for the harmonic distortion due to the different PWM strategies. The values of harmonic distortion, computed based on these analytical expressions, compare well with those calculated based on Fourier analysis and those measured experimentally.