Thesis. 1975. Ph.D.--Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. / Vita. / Bibliography: leaves 237-242. / Ph.D.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1981. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Ralph Benhart Iverson. / M.S.

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The ability to anticipate future capabilities of technology products has broad implications for organizations. Technological forecasting allows management to improve resource allocation, make better staffing decisions, and more confidently plan facilities and capital expenditures. Technology forecasting may also identify potential new markets and opportunities, such as finding ways to exploit current technology beyond its originally intended purposes. Modern technology forecasters use an array of forecasting methods to predict the future performance of a technology, such as time-series analysis, regression, stochastic methods, and simulation. These quantitative methods rely on the assumption that past behavior will continue. Shortcomings include their lack of emphasis on the best technology available and the fact that they do not effectively address the dynamic nature of ever changing trade-off surfaces. This research proposes a new method to address the shortcomings of common forecasting techniques by extending a well-established management science methodology known as data envelopment analysis (DEA). This new method is referred to as Technology Forecasting with Data Envelopment Analysis (TFDEA). Three case studies are examined to determine the method's validity. The first case study is that of relational database system performance based upon industry benchmarks obtained from the Transaction Processing Performance Council (TPC). The results reveal that TFDEA provides a more accurate picture of the state of the art than basic regression. The second case study expands Moore's law to six dimensions, resulting in a more comprehensive assessment of microprocessor technology. The final case study re-examines hard disk drive data for the years 1994-1999 in order to evaluate the technological progress of multiple technological approaches presented in Christensen's The Innovator's Dilemma . Major contributions include both a new technology forecasting technique and an important extension of the temporal DEA methodology, which together offer a new and more comprehensive method for evaluating and forecasting technology.

This project was undertaken to study the feasibility of constructing a briefcase size, portable computer system that could store and display the entire file of medical records of a practicing physician. The concept and most of the preliminary designs had been formulated previously. The project paper has given some of the design parameters as well as enough technical data to give the reader a clear idea of the project limits. No attempt was made to allow any reader enough technical information to construct a similar device.The concept of feasibility is herein explored, and the attempt is made to show that such a device is now constructed in sections and each section performs its function properly. Time did not allow the finishing touches to be worked out, but every aspect described in the "proposal" has been demonstrated to be feasible. Photographs in the Appendix depict the various aspects of construction.Ball State UniversityMuncie, IN 47306

This dissertation describes efficient design of tamper-resistant secure processor and cryptographic memory protection model that will strength security of a computing system. The thesis proposes certain cryptographic and security features integrated into the general purpose processor and computing platform to protect confidentiality and integrity of digital content stored in a computing system's memory. System designers can take advantages of the availability of the proposed security model to build future security systems such as systems with strong anti-reverse engineering capability, digital content protection system, or trusted computing system with strong tamper-proof protection. The thesis explores architecture level optimizations and design trade-offs for supporting high performance tamper-resistant memory model and micro-processor architecture. It expands the research of the previous studies on tamper-resistant processor design on several fronts. It offers some new architecture and design optimization techniques to further reduce the overhead of memory protection over the previous approaches documented in the literature. Those techniques include prediction based memory decryption and efficient memory integrity verification approaches. It compares different encryption modes applicable to memory protection and evaluates their pros and cons. In addition, the thesis tries to solve some of the security issues that have been largely ignored in the prior art. It presents a detailed investigation of how to integrate confidentiality protection and integrity protection into the out-of-order processor architecture both efficiently and securely. Furthermore, the thesis also expands the coverage of protection from single processor to multi-processor.

Thesis (Ph. D.)--University of California, Riverside, 2008. / Includes abstract. Available via ProQuest Digital Dissertations. Title from first page of PDF file (viewed March 10, 2010). Includes bibliographical references (p. 126-135). Also issued in print.

Thesis (Ph. D.)--University of California, San Diego, 2001. / Vita. Includes bibliographical references.

The surface chemistry of GeH[subscript x] with dielectric surfaces is relevant to the application of germanium (Ge) nanocrystals for nanocrystal flash memory devices. GeH[subscript x] surface chemistry was first explored for thermally-grown SiO₂ revealing that GeH[subscript x] undergoes two temperature dependent reactions that remove Ge from the SiO₂ surface as GeH₄ and Ge, respectively. Ge only accumulates due to reactions between GeH[subscript x] species that form stable Ge clusters on the SiO₂ surface. Next, a Si-etched SiO₂ surface is probed by GeH[subscript x] revealing that the Si-etching defect activates the surface toward Ge deposition. The activation involves two separate reactions involving, first, the capture of GeH[subscript x] by the defect and second, a reaction between the captured Ge and remaining GeH[subscript x] species leading to the formation of Ge clusters. Reacting the defect with diborane, deactivates it toward GeH[subscript x] and also deactivates intrinsic hydroxyl groups toward GeH[subscript x] adsorption. A structure is proposed for the Si-etching defect. The surface chemistry of GeHx with HfO₂ is studied showing that the hafnium germinate that forms beneath the Ge nanocrystals exists as islands and not a continuous film. Annealing the hafnium germinate under a silane atmosphere will reduce it to Ge while leading to the deposition of hafnium silicate (HfSiO[subscript x]) and silicon (Si). Treating the HfO₂ with silane prior to Ge nanocrystal growth yields a surface with hafnium silicate islands on which Si also deposits. Ge deposition on this surface leads to the suppression of hafnium germinate formation. Electrical testing of capacitors made from Ge nanocrystals and HfO₂ shows that Ge nanocrystals encapsulated in Si/HfSiO[subscript x] layers have greatly improved retention characteristics. / text